• Title/Summary/Keyword: 선형 전력증폭기

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Design of Class-E Power Amplifier for Wireless Energy Transfer (무선 에너지 전송을 위한 Class-E 전력증폭기 설계)

  • Ko, Seung-Ki;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.48 no.2
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    • pp.85-89
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    • 2011
  • In this paper, a novel Class-E power amplifier using metamaterials has been realized with one RF LDMOS diffusion metal-oxide-semiconductor field effect transistor. The CRLH structure can lead to metamaterial transmission line with the Class-E power amplifier tuning capability. The CRLH TL is achieved by the frequency offset and the nonlinear phase slope of the CRLH TL for the matching network of the power amplifier. Also, the proposed power amplifier has been realized by using the CRLH structure in the output matching network for better efficiency. Operating frequencies are chosen at 13.56 MHz in this work. The measured results show that the output power of 39.83 dBm and the gain of 11.83dB was obtained. At this point, we have obtained the power-added efficiency (PAE) of 73 % at operation frequency.

Performance Analysis of 6.78MHz Current Mode Class D Power Amplifier According to Load Impedance Variation (부하 임피던스 변화에 따른 6.78MHz 전류모드 D급 전력증폭기 특성 해석)

  • Go, Seok-Hyeon;Park, Dae-kil;Koo, Kyung-Heon
    • Journal of Advanced Navigation Technology
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    • v.23 no.2
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    • pp.166-171
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    • 2019
  • This paper has designed a current mode class D power amplifier to increase the transmission efficiency of a 6.78 MHz wireless power transfer (WPT) transmitter and to ensure stable characteristics even when the transmitting and receiving coil intervals change. By reducing the loss due to the parasitic capacitor component of the transistor, which limits the theoretical efficiency of the linear amplifier, this research has improved the efficiency of the power amplifier. The circuit design simulator was used to design the high efficiency amplifier, and the power output and efficiency characteristics according to the load impedance change have been simulated and verified. In the simulation, 42.1 dBm output and 95% efficiency was designed at DC bias 30 V. The power amplifier was fabricated and showed 91% efficiency at the output of 42.1 dBm (16 W). The transmitting and receiving coils were fabricated for wireless power transfer of the drone, and the maximum power added efficiency was 88% and the output power was $42.1dBm{\pm}1.7dB$ according to the load change causing from the coil intervals.

Performance Evaluation of High Speed Wireless LAN Systems Using OFDM Technique (OFDM 방식을 이용한 고속 무선 LAN 시스템의 성능 분석)

  • 윤경석;류명규;최승국
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.8A
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    • pp.1367-1377
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    • 2001
  • 고전력 증폭기의 비선형성, 수신 주파수 편차 및 심볼 타이밍 편차가 모두 존재하는 실제 IEEE 802.11a 무선 LNA 시스템의 성능을 분석하였다. 이러한 시스템에서 데이터가 OFDM 변조된 후 주파수 선택적 Rayleigh 페이딩 채널을 통하여 전송될 때의 비트 오류율을 구하였다. 증폭기의 최대 출력 전력 대 평균 출력 전력비가 6dB이며 주파수 편차가 0.01이고 심볼 타이밍 편차가 2 샘플링 주기 시간인 경우에, 이 무선 LAN 시스템에서 10-5의 비트 오류율을 얻기 위하여 필요한 $E_{b}$ /$N_{o}$ 의 크기는 대략 20~24dB로 분석되었다. 이와 같은 실제 시스템과 정확한 채널 추정, 선형 증폭기, 정확한 주파수 동기 및 심볼 동기 가정의 이상적인 시스템간의 성능을 비교한 결과, 같은 크기의 비트 오류율을 얻기 위하여 이 실제 시스템에서 대략 1~3dB 정도의 $E_{b}$ /$N_{o}$ 가 더 소요된다.

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A Study on Implementation of Linear 25Watts High Power Amplifier for VDR (VDR을 위한 선형 25Watts 고출력 증폭기 구현에 관한 연구)

  • Choi, Jun-Su;Hur, Chang-Wu
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.389-391
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    • 2011
  • This paper has been studied about design of linear 25Watt Power amplifier for VDR(VHF Data Radio). VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. It also stated in DO-281A MOPS output power, symbol constellation error, spurious emissions, adjacent channel power must be met. HPA is designed to meet DO-281A standard.

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Linearization of OFDM signal using Predistorter (OFDM 신호의 사전 왜곡제거기를 이용한 비선형 왜곡보상)

  • 신은영;방성일
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.2
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    • pp.9-18
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    • 2004
  • OFDM is a special case of multicarrier transmission, where a high-rate datastream is transmitted over a number of lower rate subcarriers. In this paper, the structure of ORM system is studied, and causes of inter carrier interference (ICI) are analyzed. Based on analysis, this paper shows a technique to prevent a distortion due to nonlinearity of high power amplifier. The proposed scheme is a predistorter(PD) for high power amplifier linearization in OFDM system. This is verified by comparing BER characteristics of OFDM system, between used PD and not used PD, and superiority is shown by comparing BER characteristics of OFDM system, between used the proposed PD and used some other PDs.

Design and Fabrication of 5 GHz Band MMIC Power Amplifier for Wireless LAN Applications Using Size Optimization of PHEMTs (PHEMT 크기 최적화를 이용한 무선랜용 5 GHz 대역 MMIC 전력증폭기 설계 및 제작)

  • Park Hun;Hwang In-Gab;Yoon Kyung-Sik
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6A
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    • pp.634-639
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    • 2006
  • In this paper an MMIC 2-stage power amplifier is designed and fabricated for 5GHz wireless LAN applications using $0.5{\mu}m$ gate length PHEMT transistors. The PHEMT gate width is optimized in order to meet the linearity and efficiency of the MMIC power amplifier. The $0.5{\mu}m\times600{\mu}m$ PHEMT for the drive stage and $0.5{\mu}m\times3000{\mu}m$ PHEMT for the amplification stage are the optimized sizes to achieve more than 25dBc of third order IMD at the power level of 3dB back-off from the input P1dB and more than 22dBm output power under a supply voltage of 3.3V. The two-stage MMIC power amplifier is designed to be used for the both of HIPERLAN/2 and IEEE 802.11a because of its broadband characteristics. The fabricated PHEMT MMIC power amplifier exhibits a 20.1dB linear power gain, a maximum 22dBm output power, a 24% power added efficiency under 3.3V supply voltage. The input and output on-chip matching circuits are included on a chip of $1400\times1200{\mu}m^2$.

Design of Low-Power Programmable Gain Amplifier with DC-offset Cancellation (직류 오프셋 제거 기능을 가진 저 전력 PGA 설계)

  • Kim, Cheol-Hwan;Seong, Myeong-U;Choi, Seong-Kyu;Choi, Geun-Ho;Kim, Shin-Gon;Han, Ki-Jung;Rastegar, Habib;Ryu, Jee-Youl;Noh, Seok-Ho
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.299-301
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    • 2014
  • 본 논문에서는 직류 오프셋 (DC-offset) 제거 기능을 가진 저 전력 자동 이득 조절 증폭기 (PGA, Programmable Gain Amplifier)를 제안한다. 이러한 회로는 직류 오프셋 문제점을 해결하기 위해 기존의 gm-boosting 증폭기를 변형한 디지털 이득 제어 방식으로 설계되어 있기 때문에 우수한 선형성을 가진다. 또한 특수 목적에 맞도록 그 이득을 6dB에서 60dB까지 7단계로 조절 가능하며, 밀러효과를 이용한 AC-coupling 방식으로 큰 값의 유동적인 커패시터와 저항을 구현하여 직류 오프셋을 제거한다. 제안한 PGA는 기존 회로에 비해 0.2dB 보다 작은 이득오차와 0.47mW의 낮은 소비전력 특성을 보였다.

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Design of a High Power Asymmetric Doherty Amplifier with a Linear Dynamic Range Characteristic (선형적인 동적 영역 특성을 갖는 고출력 비대칭 도허티 전력 증폭기의 설계)

  • Lee Ju-Young;Kim Ji-Yeon;Lee Dong-Heon;Kim Jong-Heon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.6 s.109
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    • pp.538-545
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    • 2006
  • In this paper, an asymmetric high power extended Doherty amplifier for WCDMA base-station applications is presented. The amplifier has an extended peak efficiency over 9 dB of output power and a linear dynamic range characteristic. To realize the peak efficiency extension and linear dynamic range characteristic, a two times larger peaking device compared to the main device, and an unequal power divider are used. From the experimental results of 1FA WCDMA signal, this amplifier has an efficiency of 31 % and an ACLR of -35 dBc is achieved at 9 dB back-off from P1 dB.

Compensation Techniques for TWTA non-linear intermodulation of Satellite WiBro

  • Shrestha, Robin;Lee, Byung-Seub
    • Journal of Satellite, Information and Communications
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    • v.3 no.1
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    • pp.15-21
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    • 2008
  • The high peak to average power ratio (PAPR) of OFDM (Orthogonal Frequency Division Multiplexing) system introduces inevitable non-linear distortion in the transmission due to the amplifier non-linear property. This causes both in-band distortion and out of band spectrum re-growth. In this paper we tried to compensate the problem by using polynomial based pre-distortion. Estimation of both the non-linear and inverse non-linear polynomial is achieved using the Least Square Error (LSE) method. Using these parameters closed form pre-distorter can be easily created. We also used the 'partial peak cancellation and clipping' method to remove the high peak present in the non constant amplitude of the OFDM signal responsible to drive the amplifier in near saturation region for better performance of the system

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dB-Linear CMOS Variable Gain Amplifier for GPS Receiver (dB-선형적 특성을 가진 GPS 수신기를 위한 CMOS 가변 이득 증폭기)

  • Jo, Jun-Gi;Yoo, Chang-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.7
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    • pp.23-29
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    • 2011
  • A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.