• Polymer(Korea)
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• v.24 no.1
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• pp.16-22
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• 2000

Poly(butylene terephthalate- co-oxybenzoate)(PBOT) containing mesogenic oxybenzoate units in the main chain was synthesized through ester exchange reaction by melt mixing of poly(butylene terephthalate)(PBT) and p-acetoxybenzoic acid (ABA). From the kinetics of the copolymerization reaction, the activation energies and the rate constants of homopolymerization and copolymerization, k$_{h}$ and k$_{c}$, could be determined. From the reaction conditions of different compositions, 4/6, 5/5, and 6/4 of PBT/ABA, at 250, 260, and 27$0^{\circ}C$, it was revealed that copolymerization between PBT and ABA proceeds on a pseudo-second order reaction if the ABA content and its conversion are low. In this case, the ratio of rate constants of homopolymerization to copolymerization was in the range from 1.08 to 3.17, indicating that the copolymer with more notable block character was obtained at the higher mole fraction of ABA and at higher temperature.e.e.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.5
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• pp.83-88
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• 2024

In a grid board with 9 cells of 3×3, the sum clue Sujiko puzzle with 4 fixed sum clues(FSCs) and variable sum clues(VSCs) is an NP-complete problem with no known way to solve the puzzle in polynomial time. To solve this puzzle 9! in all possible cases, a brute-force method should be applied to substitute the number. This paper determined the unique combination number cell by reducing the number of candidates that can enter empty cells. If the only number combination cell no longer exists, this paper proposes a method for determining a common number network with numbers common to the intersection cell of FSC+VSC. Applying the proposed algorithm to 9 benchmarking experimental data showed that puzzles can be solved in polynomial time for all problems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.6
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• pp.1355-1362
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• 2011

This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. Our LDPC decoder adopts a block-serial architecture based on min-sum algorithm and layered decoding scheme. A novel way to store check-node values and parity check matrix reduces the sizes of check-node memory and H-ROM. An efficient scheme for check-node memory addressing is used to achieve stall-free read/write operations. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.24 no.5
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• pp.159-168
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• 2024

In a grid board with 9 cells of 3X3, the Sujiko puzzle with 4 sum clues and C number clues as one block is an NP-complete problem with no known way to solve the puzzle in polynomial time. To solve this puzzle (9-C)! in all possible cases, a brute-force method should be applied to substitute the number. This paper confirmed the clue of the unique number cell by reducing the number of candidates that can enter empty cells. When the unique number cell no longer exists, a method of selecting the intersection combination numbers between the sum clue blocks has been proposed. Applying the proposed algorithm to 52 benchmarking experimental data showed that puzzles can be solved in polynomial time for all problems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.1C
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• pp.65-73
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• 2006

The purpose of this study is to design and analyze the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth in PCM/FM transmission system. For the implementation of this required filter, the digital FIR filter, DAC and variable 2nd order LPF have been constructed with the filter block which designed and analyzed by each stage in order to satisfy the attenuation characteristic requirement of the analog 7th order bessel filter. The paper also concerned the linear phase properties for the filter block. Especially we have carried out the linear phase simulation with real parts for variable 2nd order LPF and compared this simulation results with the one of the fixed bandwidth 2nd order bessel filter for validating the linear phase requirement.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.8
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• pp.1531-1536
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• 2016

In this paper, we propose a fast motion estimation algorithm which is important in performance of video encoding. Even though so many fast algorithms for motion estimation have been published due to its tremendous computational amount of for full search algorithm, efforts for reducing computations in motion estimation still remain. In the paper, we propose an algorithm that reduces unnecessary computations only, while keeping prediction quality the same as that of the full search. The proposed algorithm does not calculate block matching error for each candidate at once to find motion vectors but divides the calculation procedure into several steps and calculates partial sum of block errors. By doing that, we can estimate the minimum error point early and get the enhancement of calculation speed by reducing unnecessary computations. The proposed algorithm uses smaller computations than conventional fast search algorithms with the same prediction quality as full search.

• Journal of the Korea Society of Computer and Information
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• v.25 no.4
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• pp.47-53
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• 2020

Blockchain is a distributed shared ledger that transparently manages information through verification and agreement between nodes connected to a distributed network. Recently, cases of data management among authorized agencies based on private blockchain are increasing. In this paper, we investigated the application cases and technical processes of PBFT, the representative consensus algorithm of private blockchain, and proposed a modified PBFT algorithm that enables efficient consensus by simplifying duplicate verification and consensus processes that occur during PBFT processing. The algorithm proposed in this paper goes through the process of selecting a delegation node through an authoritative node and can increase the safety of the delegation node selection process by considering an efficient re-election algorithm for candidate nodes. By utilizing this research, it is possible to reduce the burden on the network communication cost of the consensus process and effectively process the final consensus process between nodes.

• Journal of the Korea Computer Industry Society
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• v.2 no.6
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• pp.791-802
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• 2001

In this paper, DARC(Data Radio Channel) error correction decoder for the U Subcarrier Broadcasting System is designed of using (272,190)$\times$(272,190) product code based on (272,190) shortened difference set cyclic code. This decoder has error flag of column and row direction that can store the result of the error correction of column and row direction in the block and frame structure, is designed to be of no benefit the output with majority logic determination to cancel the corrected and determined bit, and can improve by using the error correction method that no error correction of the row direction is performed, if error correction of the column direction is completely performed by error flag.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.486-489
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• 2010

This paper describes a layered LDPC decoder which supports block length of 1,944 bits and code rate 1/2 for IEEE 802.11n WLAN standard. To reduce the hardware complexity, the min-sum algorithm and layered architecture is adopted. A novel memory reduction technique suitable for min-sum algorithm reduces memory size by 75% compared with conventional method. The designed processor has 200,400 gates and 19,400 bits memory, and it is verified by FPGA implementation. The estimated throughput is about 200 Mbps at 120 MHz clock by using Xilinx Virtex-4 FPGA device.

• Restorative Dentistry and Endodontics
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• v.35 no.2
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• pp.106-115
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• 2010

The purpose of this study was to evaluate the microtensile bond strength (${\mu}TBS$), failure modes and bonding interfaces of self-etching and three self-adhesive resin cements to dentin and indirect composite resin. Cylindrical composite blocks (Tescera, Bisco Inc.) were luted with resin cements (PA: Panavia F 2.0, Kuraray Medical Inc., RE: RelyX Unicem Clicker, 3M ESPE., MA: Maxem, Kerr Co., BI: BisCem, Bisco Inc.) on the prepared occlusal dentin surfaces of 20 extracted molars. After storage in distilled water for 24 h, $1.0\;mm\;{\times}\;1.0\;mm$ composite-dentin beams were prepared. ${\mu}TBS$ was tested at a cross-head speed of 0.5 mm/min. Data were analyzed with one-way ANOVA and Tukey's HSD test. Dentin sides of all fractured specimens and interfaces of resin cements-dentin or resin cements-composite were examined at FESEM (Field Emission-Scanning Electron Microscope). In conclusion, PA and RE showed higher bond strength and closer adaptation than MA and BI when indirect composite blocks were luted to dentin using a self-etching and three self-adhesive resin cements.