• The Journal of Korean Association of Computer Education
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• v.13 no.4
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• pp.77-86
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• 2010

In this paper, we propose a real time post-processing visual enhancement technique to reduce the blocking artifacts in block based DCT decoded image for mobile devices that have allocation of the restricted resource. In order to reduce the blocking artifacts effectively even while preserving the image edge to the utmost, the proposed algorithm uses the deblocking filtering or the directional filtering according to the edge detection of the each pixel. After it is discriminated that the pixel to apply the deblocking filtering belongs again to the monotonous area, the weighted average filter with the adaptive mask is applied for the pixel to remove the blocking artifacts. On the other hand, a new directional filter is utilized to get rid of staircase noise and preserve the original edge component. Experimental results show that the proposed algorithm produces better results than those of the conventional algorithms in both subjective and objective qualities.

• The KIPS Transactions:PartB
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• v.15B no.4
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• pp.259-268
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• 2008

In an effort to increase the data capacity of one-dimensional symbology, 2D barcodes have been proposed a decade ago. In this paper, we present an effective 2D barcode detection algorithm from gray-level images, especially for the handheld 2D barcode recognition system. To locate the symbol inside the image, a criteria based on the block contrast is adopted, and a gray-scale projection with sub-pixel operation is utilized to segment the symbol precisely from the region of interest(ROI). Finally, the segmented ROI is normalized using the inverse perspective transformation for the following decoding processes. We also introduce the post-processing steps for decoding the QR-code. The proposed method ensures high performances under various lighting/printing conditions and strong perspective deformations. Experiments shows that our method is very robust and efficient in detecting the code area for the various types of 2D barcodes in real time.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.3
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• pp.70-79
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• 2007

H.264/AVC has many repeated computation for motion estimation. Because of that, it takes much time to encode and it is very hard to implement into a real-time encoder. Many fast algorithms were proposed to reduce computation time but encoding quality couldn't be qualified. In this paper we proposed a new motion vector prediction method for efficient and fast full search H.264/AVC motion estimation. We proposed independent motion vector prediction and SAD share for motion estimation. Using our algorithm, motion estimation reduce calculation complexity 80% and less distortion of image (less PSNR drop) than previous full search scheme. We simulated our proposed method. Maximum Y PSNR drop is about 0.04 dB and average bit increasing is about 0.6%.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.2C
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• pp.172-181
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• 2010

In this paper, we propose an adaptive block quantization method. The propose method perfrect reconstructs side information without high complexity in the encoder side, as transmitting motion vectors from a decoder to an encoder side. Also, at the encoder side, residual signals between reconstructed side information and original frame are adaptively quantized to minimize parity bits to be transmitted to the decoder. The proposed method can effectively allocate bits based on bit error rate of side information. Also, we can achieved bit-saving by transmission of parity bits based on the error correction ability of the LDPC channel decoder, because we can know bit error rate and positions of error bit in encoder side. Experimental results show that the proposed algorithm achieves bit-saving by around 66% and delay of feedback channel, compared with the convntional algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5C
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• pp.454-463
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• 2010

After the efficiency of H.264 video compression has been announced, it replaced MPEG-2 standard in several applications. So transcoding methods of MPEG-2 to H.264 have been studying because there are variety devices and contents followed by MPEG-2. Although H.264 supported various service such as IPTV, DMB, digital broadcasting etc, but users using MPEG-2 devices cannot accessible to them. This paper propose H.264 to MPEG-2 transcoding for users of MPEG-2 devices without displacement H.264. The proposed method predicted a motion vector for MPEG-2 encoder after it extracted from motion vectors of variable blocks in H.264 to improve processing time. Also it predicted a optimal motion vector using modified boundary matching algorithm after grasped a special character for boundary and background of object. The experimental results from proposed method show a considerable reduction in processing time, as much as 68% averagely, with a small objective quality reduction in PSNR.

• Journal of the Korea Society of Computer and Information
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• v.14 no.10
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• pp.63-71
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• 2009

In this study, we propose a revised dynamic ROI (Region-of-Interest) coding method in which the focused ROI is automatically extracted without help from users during the recovery process of low DOF (Depth-of-Field) JPEG2000 image. The proposed method creates edge mask information using high frequency sub-band data on a specific level in DWT (Discrete Wavelet Transform), and then identifies the edge code block for a high-speed ROI extraction. The algorithm scans the edge mask data in four directions by the unit of code block and identifies the edge code block simply and fastly using a edge threshold. As the results of experimentation applying for Implicit method, the proposed method showed the superiority in the side of speed and quality comparing to the existing methods.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.11a
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• pp.161-164
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• 2013

본 논문에서는 다양한 멀티미디어 코덱을 고속으로 처리하기 위하여 전용하드웨어가 아닌 병렬 어레이 프로세서 기반의 U-Chip(Universal-Chip) 구조를 제안하고 TSMC 80nm 공정을 사용하여 11,865,090개의 게이트 수를 가지는 칩으로 개발하였다. U-Chip은 역양자화(IQ), 역변환(IT), 움직임 보상(MC) 연산을 위한 $4{\times}16$ 개의 프로세싱 유닛으로 구성된 병렬 어레이 프로세서와 문맥적응적 가변길이디코딩(CAVLC)을 위한 비트스트림 프로세서와 인트라 예측(IP), 디블록킹필터(DF) 연산을 위한 순차 프로세서와 DMAC의 데이터 전송 및 각 프로세서를 제어하여 병렬 파이프라인 스케쥴링을 처리하는 시퀀서 프로세서 등으로 구성된다. 1개의 프로세싱 유닛에 1개의 매크로블록 데이터를 맵핑하여 총 64개의 매크로블록을 병렬처리 하였다. 64개 매크로블록의 대용량 데이터 전송 시간과 각 프로세서들의 연산을 동시에 병렬 파이프라인 함으로서 전체 연산 성능을 높일 수 있는 이점이 있다. 병렬 파이프라인 구조의 H.264 디코더 프로그램을 개발하였고 제작된 U-Chip을 통해 $720{\times}480$ 크기의 베이스라인 프로파일 영상에 대하여 코어 192MHz 동작, DDR 메모리 96MHz 동작에서 30fps의 처리율을 가짐을 확인하였다.

• The KIPS Transactions:PartB
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• v.13B no.6 s.109
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• pp.607-614
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• 2006

In this paper, we propose an error resilience video coder which uses a hybrid error concealment algorithm. Firstly, the algorithm uses the error concealment with data hiding. If the hiding information is lost, the motion vector of lost macroblock is computed with adaptive selection of adjacent motion vectors and OBMC (Overlapped Block Motion Compensation) is applied with this motion vector. We know our algorithm is more effective in case of continuous GOB. The results show more significant improvement than many temporal concealment methods such as MVRI (Motion Vector Rational Interpolation) or existing error concealment using data hiding.

• Journal of IKEEE
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• v.17 no.3
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• pp.352-359
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• 2013

This paper proposes an entropy coding unit for H.264/AVC baseline profile. Entropy coding requires code tables for macroblock encoding. There are patterns in codewords of each code tables. In this paper, the patterns between codewords are analyzed to reduce the hardware cost. The entropy coding unit consists of Exp-Golomb unit and CAVLC unit. The Exp-Golomb unit can process five code types in a single unit. It can perform Exp-Golomb processing using only two adders. While typical CAVLC units use various code tables which require large amounts of resources, the sizes of the tables are reduced to about 40% or less of typical CAVLC units using relationships between table elements in the proposed CAVLC unit. After the Exp-Golomb unit and the CAVLC unit generate code values, the entropy unit uses a small size shifter for bit-stream generation while typical methods are barrel shifters.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.43-48
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• 2008

This paper presents a design of 8B/10B encoder by the coding table reduction. The proposed encoder has reduced coding table modified disparity control block. Logic simulation and synthesis have been done for the proposed design. After synthesized using Magna CMOS $0.18{\mu}m$ process, the proposed design achieved the operating frequency of 343MHz and chip area of $1886{\mu}m^2$.