• The KIPS Transactions:PartA
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• v.13A no.2 s.99
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• pp.123-136
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• 2006

The prefetching technique is an effective way to reduce the latency caused memory access. However, excessively aggressive prefetch not only leads to cache pollution so as to cancel out the benefits of prefetch but also increase bus traffic leading to overall performance degradation. In this thesis, a prefetch filtering scheme is proposed which dynamically decides whether to commence prefetching by referring a filtering table to reduce the cache pollution due to unnecessary prefetches In this thesis, First, prefetch hashing table 1bitSC filtering scheme(PHT1bSC) has been shown to analyze the lock problem of the conventional scheme, this scheme such as conventional scheme used to be N:1 mapping, but it has the two state to 1bit value of each entries. A complete block address table filtering scheme(CBAT) has been introduced to be used as a reference for the comparative study. A prefetch block address lookup table scheme(PBALT) has been proposed as the main idea of this paper which exhibits the most exact filtering performance. This scheme has a length of the table the same as the PHT1bSC scheme, the contents of each entry have the fields the same as CBAT scheme recently, never referenced data block address has been 1:1 mapping a entry of the filter table. On commonly used prefetch schemes and general benchmarks and multimedia programs simulates change cache parameters. The PBALT scheme compared with no filtering has shown enhanced the greatest 22%, the cache miss ratio has been decreased by 7.9% by virtue of enhanced filtering accuracy compared with conventional PHT2bSC. The MADT of the proposed PBALT scheme has been decreased by 6.1% compared with conventional schemes to reduce the total execution time.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1113-1124
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel fur the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit of a field synchronized with the A/D converter. The implemented H/W used the 69%(16980) LAB(Logic Array Block) and 9%(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation of 60 fields/sec(30 frames/sec).

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.2
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• pp.117-122
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• 2009

In this paper, the performance of double binary turbo code is analyzed and simulated in ultra wide-band (UWB) systems employing multiple-antenna scheme. We consider both pulse position modulation-time hopping (PPM-TH) and pulse amplitude modulation-direct sequence (PAM-DS) UWB systems. The space time block code (STBC) scheme is adopted as a transmit diversity method. Also, receive diversity scheme is applied. And double binary turbo code is applied to the UWB system.

• Annual Conference of KIPS
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• 2003.05b
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• pp.1369-1372
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• 2003

가까운 장래에 싼 가격의 블루투스가 여러 가지 이동, 휴대 장치에 내장되어 다양한 응용서비스를 제공할 것이다. 본 논문에서는 공항이나 쇼핑몰 등 사람들이 많이 몰리는 공공장소와 같은 핫스팟(hot spot) 지역에서 블루투스 기지국을 통한 음성서비스 제공을 위하여 다수의 기지국을 유서 LAN으로 협동시켜 각각 기지국별로 따로 제공되던 음성 채널들을 집합화(aggregation) 함으로써 보다 많은 음성 서비스 채널들을 동시에 수용할 수 있는 방법을 제시하고 성능을 분석하였다. 단독으로 동작하는 기지국은 ACL채널을 사용하는 경우 7개까지의 채널 수용이 가능하므로 이상적인 경우에서도 오버랩 영역의 기지국의 개수가 n이면 7n 만큼 채널의 증가가 가능한 반면 협동으로 동작하면 블록킹 율도 개선되면서 집합화된 채널들을 보간(interpolation) 기법을 통한 통계적 사용으로 음성 패킷의 허용 손실 범위 내에서 음성채널의 수를 약 14n 정도까지 확장할 수 있다. 또한 음성전송과 데이터 전송이 혼합 서비스 될 때 수용하는 음성 채널의 수에 따른 데이터 전송지연시간 특성을 분석하였다.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.5
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• pp.1-11
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• 2004

In this paper we proposed a hierarchical ASM for real-time tracking of non-rigid objects. For tracking an object we used ASM for estimating object contour possibly with occlusion. Moreover, to reduce the processing time we used hierarchical approach for real-time tacking. In the next frame we estimated the initial feature point by using Kalman filter. We also added block matching algorithm for increasing accuracy of the estimation. The proposed hierarchical, prediction-based approach was proven to out perform the exiting non-hierarchical, non-prediction methods.

• The Transactions of the Korea Information Processing Society
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• v.7 no.5
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• pp.1587-1598
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• 2000

For the object-based video compression at very low bit rate, vieo segmentation is an essential part. In this paper, we propose a temporal video segmentation algorithms for motion pictures which is based on blocks. The algorithm is composed of three steps: (1) the change-detection, (2) the block merging, and (3) the block segmentation. The first step separates the change-detected region from background. Here, a new method for removing the uncovered region without motion estimation is presented. The second step, which is further divided into three substeps, estimates motions for the change-detected region and merges blocks with similar motions. The merging conditions for each substep as criteria are also given. The final step, the block segmentation, segments the boundary block that is excluded from the second step on a pixel basis. After describing our algorithm in detail, several experimental results along the processing order are shown step by step. The results demonstrate that the proposed algorithm removes the uncovered region effectively and produced objects that are segmented well.

• 전자공학회논문지 IE
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• v.44 no.1
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• pp.15-19
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• 2007

A study to have read does an improvement of an error restoration technology based on the edge direction interpolation that a stop image cared for inside frame correction more than with an image restoration way of a transfer error or with an aim. A way proposed to is based on edge direction detection method of a block utilizing the edge direction which will adjust a part damaged a sweater to a remaining part here. The rest of error pixel used non linear Midian filter for process later data information by the final stage and did interpolation. The examination result shows a good recuperation tendency and low accounts time of a way proposed to realization possibility of a real time image processing.

• The Transactions of the Korea Information Processing Society
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• v.7 no.10
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• pp.3272-3279
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• 2000

In this paper, we propose two fast VQ coclebook search algorithms efficient to the Wavelet/ VQ coding schemes. It is well known that the probability having large values in wavelet coefficient blocks is very low. In order to apply this property to codebook search, the index tables of the reordered codebook in each wavelet subband ae used. The exil condition in PDE can be satisfied in an earlystage by comparing the large coefficients of the codeword with their corresponding elements of input vector using the index tbles. As a result, search time can be reduced.

• The KIPS Transactions:PartA
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• v.13A no.3 s.100
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• pp.185-190
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• 2006

JPEG 2000 is used as an alternative to solve the blocking artifact problem with the existing still image compression JPEG algorithm. However, it has shortcomings such as longer floating point computation time and more complexity in the procedure of enhancing the image compression rate and decompression rate. To compensate for these we implemented with hardware the JPEG 2000 algorithm's filter part which requires a lot of floating point computation. This DWT Filter[1] chip is designed on the basis of Daubechies 9/7 filter[6] and is composed of 3-stage pipeline system to optimize the performance and chip size. Our implemented Filter was 7 times faster than software based Filter in the floating point computation.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.1
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• pp.41-47
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• 2002

Fractal image compression can reduce the size of image data by the contractive mapping that is affine transformation to find the block(called as range block) which is the most similar to the original image. Even though fractal image compression is regarded as an efficient way to reduce the data size, it has high distortion rate and requires long encoding time. In this paper, we presented a hybrid fractal image compression system with the modified SOFM Vector Quantizer which uses improved competitive learning method. The simulation results showed that the VQ hybrid fractal using improved competitive loaming SOFM has better distortion rate than the VQ hybrid fractal using normal SOFM.