• Journal of KIISE:Information Networking
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• v.28 no.2
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• pp.236-241
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• 2001

A new scheme is proposed to speed up a known bandwidth measuring method which employs potential bandwidth for filtering out noiscs (in cstirna60nl from time compression caused by a packet queueing ahead of two probe packets. Instead of inerementing the potential bandwidth by a fixed amount as in the original method we increase the potential bandwidth exponentially for faster convergence. To retain its filtering capability as well as its agility to adapt to new bottleneck bandwidth, each trial potential bandwidth(PB) is adjusted using MAX and MIN as upper bound and lower bound. An experiment using known bandwidths shows 45~g9% improvement in conVergence time.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.7
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• pp.799-803
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• 2010

The KDB-tree is a traditional indexing scheme for retrieving multidimensional data. Much research for KDB-tree family frequently addresses the low storage utilization and insufficient retrieval performance as their two bottlenecks. The bottlenecks occur due to a number of unnecessary splits caused by data insertion orders and data skewness. In this paper, we propose a novel index structure, called as $KDB_{CS}^+$-tree, to process skewed data efficiently and improve the retrieval performance. The $KDB_{CS}^+$-tree increases the number of fan-outs by exploiting bit-vectors for representing splitting information and pointer elimination. It also improves the storage utilization by representing entries as a hierarchical structure in each internal node.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.37-39
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• 2005

요즘 네트웍과 PC의 성능이 향상됨에 따라 값싼 PC를 빠른 네트웍으로 묶어 높은 성능을 얻고자 하는 클러스터 시스템에 대하여 많이 연구 되어 왔다. 이러한 연구의 한 분야로서 클러스터 I/O 하위 시스템의 성능을 향상시키고자 하는 상호 협력 캐쉬가 제시되었다. 기존 상호 협력 캐쉬에 대한 연구는 주로 효율적인 캐쉬 공유 기법에만 집중되어있고 쓰기 성능에 대한 고려는 하지 않고 있다. 또한 대부분의 읽기 데이터는 상호 협력 캐쉬를 통하여 처리되지만 쓰기 데이터는 디스크에 접근하기 때문에 쓰기가 병목현상이 될 수 있다. 따라서 상호 협력 캐쉬에서 읽기 뿐 아니라 쓰기 성능 향상 기법에 대한 연구가 필요하다. 본 논문에서는 상호 협력 캐쉬에서 쓰기 성능 향상 기법으로 확장 가능한 두 단계 프로토콜을 제시한다. 확장 가능한 두 단계 프로토콜은 기존 두 단계 프로토콜과 같이 파일에 읽기/쓰기 접근을 연속된 읽기/쓰기 단계로 나누고, 쓰기 단계에서 연속된 쓰기사이의 불필요한 동작을 제거할 뿐 아니라 쓴 데이터에 대한 일시적 버퍼링을 수행함으로서 쓰기 성능을 향상시킨다. 그리고 확장 가능한 두 단계 프로토콜을 상호 협력 클러스터 파일 시스템의 홈 기반 상호 협력 캐쉬에 적용하여 성능을 비교, 분석한다.

• Proceedings of the KAIS Fall Conference
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• 2009.12a
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• pp.957-960
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• 2009

최근 대용량 데이터 저장을 위한 스토리지에 대한 요구가 증가되고 있다. 이들 대용량 스토리지 시스템은 다양한 형상으로 구성될 수 있으며 학교, 기업 및 정부기관에서는 스토리지 성능은 기업 내부 전체 정보 시스템의 성능을 결정하는 주요한 요소로서 영향을 미친다. 그러나 성능시험을 위한 이형의 환경과 시험을 위한 성능 파라매터가 상이함으로 인해 스토리지 벤더에서는 제공하는 결과에 대한 평가가 쉽지 않다. 이 논문에서는 스토리지 성능시험 기법과 벤치마킹을 위한 성능시험환경을 제안한다. 성능시험 환경은 NGS 시스템 아키텍처 내의 병목 현상을 제거하고 입출력 대역폭을 늘려 성능을 최적화에 활용할 수 있다.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.1
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• pp.105-113
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• 2013

RAID systems have been widely used by connecting several disks in parallel structure. to resolve the delay and bottleneck of data I/O. Recently, SSD based RAID systems are emerging since SSDs have better I/O performance than HDD. However, endurance and power consumption problems due to frequent write operation in SSD based RAID system should be resolved. In this paper, we propose a de-duplication method of parity disk in SSD based RAID system with expensive update cost. The proposed method segments chunk of parity data into small pieces and removes duplicate data, therefore, it can reduce wear-leveling and power consumption by decreasing write operation for duplicated parity data. Experimental results show that bit update rate of the proposed method is 16% in total disk, 31% in parity disk less than that of existing method in RAID-6 system using EVENODD erasure code, and the power consumption of the proposed method is 30% less than that of existing method. Besides the proposed method is 12% in total disk, 32% in parity disk less than that of existing method in RAID-5 system, and the power consumption of the proposed method is 36% less than that of existing method.

• The KIPS Transactions:PartD
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• v.8D no.4
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• pp.377-386
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• 2001

In spatial database system, spatial view is supported for efficient access method to spatial database and is managed by materialization and non-materialization technique. In non-materialization technique, repeated execution on the same query makes problems such as the bottle-neck effect of server-side and overloads on a network. In materialization technique, view maintenance technique is very difficult and maintenance cost is too high when the base table has been changed. In this paper, the SVMT (Spatial View Materialization Technique) is proposed by using R-tree re-construction. The SVMT is a technique which constructs a spatial index according to the distribution ratio of objects in spatial view. This ratio is computed by using a SVHR (Spatial View Height in R-tree) and SVOC (Spatial View Object Count). If the ratio is higher than the average, a spatial view is materialized and the R-tree index is re-used. In this case, the root node of this index is exchanged a node which has a MBR (Minimum Boundary Rectangle) value that can contains the whole region of spatial view at a minimum size. Otherwise, a spatial view is materialized and the R-tree is re-constructed. In this technique, the information of spatial view is managed by using a SVIT (Spatial View Information Table) and is stored on the record of this table. The proposed technique increases the speed of response time through fast query processing on a materialized view and eliminates additional costs occurred from repeatable query modification on the same query. With these advantages, it can greatly minimize the network overloads and the bottle-neck effect on the server.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.1
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• pp.64-70
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• 2008

The H.264 standard is widely used due to the high compression rate and quality. The deblocking filter of the H.264 standard improves the quality of images by eliminating blocking artifacts of pictures, and it requires a lot of computation. We propose a new hardware architecture for the deblocking filter with pipelined architecture, 1-D filters which support both horizontal and vertical filtering and efficient memory management. Four memory blocks are configured for the efficient storage and access of the current macroblock and adjacent referenced sub-macroblocks, and the pixel data from the motion compensation unit can be transferred without waiting during the computation cycles of the deblocking filter. The number of computation cycles and the hardware area are reduced using the proposed architecture, and the performance of the H.264 decoder is improved. We design the deblocking filter using Verilog-HDL and implement using an FPGA. The designed deblocking filter can be used for decoding HD quality images at 77 MHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.8C
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• pp.670-679
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• 2012

The recent dissemination of cloud computing makes the amount of data storage to be increased and the cost of storing the data grow rapidly. Accordingly, data and service requests from users also increases the load on the cloud storage. There have been many works that tries to provide low-cost and high-performance schemes on distributed file systems. However, most of them have some weaknesses on performing parallel and random data accesses as well as data accesses of frequent small workloads. Recently, improving the performance of distributed file system based on caching technology is getting much attention. In this paper, we propose a CHPC(Cloud storage High-Performance Caching) framework, providing parallel caching, distributed caching, and proxy caching in distributed file systems. This study compares the proposed framework with existing cloud systems in regard to the reduction of the server's disk I/O, prevention of the server-side bottleneck, deduplication of the page caches in each client, and improvement of overall IOPS. As a results, we show some optimization possibilities on the cloud storage systems based on some evaluations and comparisons with other conventional methods.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3653-3659
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• 2009

Inter-prediction is always the main bottleneck in H.264/AVC baseline profile. This paper describes an efficient inter-prediction hardware architecture design. H.264/AVC decoder supports various block types but reference software considers only the $4{\times}4$ block when the reference block is being fetched. This causes duplicated pixels which needs extra fetch cycles. In order to eliminate some of the duplicated pixels, the $8{\times}8$ and $4{\times}4$ blocks were considered in the previous design. If the block size is larger than or equal to the $8{\times}8$ block, it will be decomposed into several $8{\times}8$ blocks and if the block size is smaller than the $8{\times}8$ block it will be decomposed into several $4{\times}4$ blocks. Comparing with the reference software, the maximum and minimum cycle reduction of the previous design are 41.5% and 28.2% respectively. For further reduction of the fetch cycles, the various block types are considered in this paper. As a result, the maximum cycle reduction is 18.6% comparing with the previous design.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.05a
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• pp.112-115
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• 2009

Inter-Prediction is always the main bottleneck in H.264/AVC Baseline Profile. This paper describes an efficient Inter-Prediction hardware architecture design. H.264/AVC decoder supports various block types such as $16{\times}16$, $16{\times}8$, $8{\times}16$, $8{\times}8$, $8{\times}4$, $4{\times}8$, $4{\times}4$ block types. Reference Software(JM) only considers the $4{\times}4$ block type when the reference block is being fetched. This causes duplicated pixels which needs extra fetch cycles. In order to eliminate some of the duplicated pixels, the $8{\times}8$ and $4{\times}4$ block types were considered in the previous design. If the block size is larger than or equal to the $8{\times}8$ block type, it will be separated into several $8{\times}8$ block types and if the block size is smaller than the $8{\times}8$ block type it will be separated into several $4{\times}4$ blocks. For further reduction of the fetch cycles, the various block types are considered in this paper. As a result, the maximum cycle reduction percentage is 18.6% comparing with the previous design.