• Title/Summary/Keyword: 변환 압축기

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Medical Image Compression in the Wavelet Transform Domain (Wavelet 변환 영역에서 의료영상압축)

  • 이상복;신승수
    • The Journal of the Korea Contents Association
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    • v.2 no.4
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    • pp.23-29
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    • 2002
  • This paper suggest the image compression that is needed to process PACS in medical information system. The image decoding method is used Linear-predictor and Lloyd-Max quantizer(quantization) in the Wavelet transform domain. Wavelet Transform Method is processed the multi-resolution by dividing image into 10 sub-bands of 3 levels. Low frequency domain that is sensitive to human visual characteristic is encoded by DPCM which is lossless encoding methods, and Lloyed-Max quantizer, the optimal quantizer for reducing ringing and aliasing in the image of inter sub-band, is used in the remaining high frequency domain of sub-band. The examination verifies that decompressed images are superior by the result that PSNR is 28.53dB on the input image, 512$\times$152 abdominal CT image and Chest image.

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A Bit-rate Converter for Selective Coding (선택적부호화를 위한 비트율 변환기)

  • Lee, Jongbae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.9
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    • pp.229-237
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    • 2014
  • This paper presents a video bitrate converter for baseline profile in H.264/AVC standards to control a selective coding scheme for several applications such as tactical scenes or multimedia area. Transmission channels have various capacities according to the application area, and the bitstream stored in computer should be converted in order not to exceed the capacities of a transmission channel. So the problem is how to convert compressed bitsreams of a given bit-rate into compressed bitsreams of other bit-rates. Such a specific transcoding problem in this paper is referred to as bit-rate conversion. Several researches have been done on bit-rate conversion for the bitstreams compressed by MPEG or H.264/AVC. But the existing schemes are not suitable for selective coding scheme because it needs to recover interest regions better image quality than background. So we propose a new bit-rate converter which considers the importance between interest regions and background.

Constant Quality Motion Compensated Temporal Filtering Video Compression using Multi-block size Motion Estimation and SPECK (다중 블록 크기의 움직임 예측과 SPECK을 이용한 고정 화질 움직임 보상 시간영역 필터링 동영상 압축)

  • Park Sang-Ju
    • Journal of Broadcast Engineering
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    • v.11 no.2 s.31
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    • pp.153-163
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    • 2006
  • We propose a new video compression method based on MCTF(motion compensated temporal filtering) with constant quality. SPECK is an efficient image compression coding method of encoding DWT coefficients. Especially SPECK method is very efficient for coding the motion compensated residual image which usually has larger amounts of high frequency components than the natural images. And proposed multi block size hierarchical motion estimation technique is more efficient than classical block matching algorithm with fixed block size both in estimation precision and operation costs. Proposed video method based on MCTF video compression can also support multi-frame rate decoding with reasonable complexity. Simulation results showed that proposed method outperforms H.263 video compression standard.

A design of Space Compactor for low overhead in Built-In Self-Test (내장 자체 테스트의 low overhead를 위한 공간 압축기 설계)

  • Jung, Jun-Mo
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.9
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    • pp.2378-2387
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    • 1998
  • This thesis proposes a design algorithm of an efficient space response compactor for Built-In Self-Testing of VLSI circuits. The proposed design algorithm of space compactors can be applied independently from the structure of Circuit Cnder Test. There are high hardware overhead cost in conventional space response compactors and the fault coverage is reduced by aliasing which maps faulty circuit's response to fault-free one. However, the proposed method designs space response compactors with reduced hardware overheads and does not reduce the fault coverage comparing to conventional method. Also, the proposed method can be extended to general N -input logic gate and design the most efficient space response L'Ompactors according to the characteristies of output sequence from CUT. The prolxlsed design algorithm is implemented by C language on a SUN SPARC Workstation, and some experiment results of the simulation applied to ISCAS'85 benchmark circuits with pseudo random patterns generated bv LFSR( Linear Feedback Shift Register) show the efficiency and validity of the proposed design algorithm.

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Condition Classification for Small Reciprocating Compressors Using Wavelet Transform and Artificial Neural Network (웨이브릿 변환과 인공신경망 기법을 이용한 소형 왕복동 압축기의 상태 분류)

  • Lim, D.S.;Yang, B.S.;An, B.H.;Tan, A.;Kim, D.J.
    • Journal of Power System Engineering
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    • v.7 no.2
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    • pp.29-35
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    • 2003
  • The monitoring and diagnostics of the rotating machinery have been received considerable attention for many years. The objectives are to classify the machinery condition and to find out the cause of abnormal condition. This paper describes a classification method of diagnosing the small reciprocating compressor for refrigerators using the artificial neural network and the wavelet transform. In order to extract salient features, the wavelet transform are used from primary noise signals. Since the wavelet transform decomposes raw time-waveform signals into two respective parts in the time space and frequency domain, more and better features can be obtained easier than time-waveform analysis. In the training phase for classification, self-organizing feature map(SOFM) and learning vector quantization(LVQ) are applied, and the accuracies of them ate compared with each other. This paper is focused on the development of an advanced signal classifier to automatize the vibration signal pattern recognition. This method is verified by small reciprocating compressors, for refrigerator and normal and abnormal conditions are classified with high flexibility and reliability.

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Design of Low-Area HEVC Core Transform Architecture (저면적 HEVC 코어 변환기 아키텍쳐 설계)

  • Han, Seung-Mok;Nam, Woo-Jin;Lee, Seongsoo
    • Journal of IKEEE
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    • v.17 no.2
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    • pp.119-128
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    • 2013
  • This paper proposes and implements an core transform architecture, which is one of the major processes in HEVC video compression standard. The proposed core transform architecture is implemented with only adders and shifters instead of area-consuming multipliers. Shifters in the proposed core transform architecture are implemented in wires and multiplexers, which significantly reduces chip area. Also, it can process from $4{\times}4$ to $16{\times}16$ blocks with common hardware by reusing processing elements. Designed core transform architecture in 0.13um technology can process a $16{\times}16$ block with 2-D transform in 130 cycles, and its gate count is 101,015 gates.

A study on the fromat converter of GA-HDTV (GA-HDTV에서의 포맷 변환기에 관한 연구)

  • 이호웅;이문기;강철호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.1971-1976
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    • 1998
  • This paper is a study on the improved version of the conventional format converter. This paper paper descries three interface systems used to record and play back the compressed digital data from the Grand Alliance(GA) HDTV system. The first interface is for recording the compressed data from the GA-HDTV to the HDVCR system, the second is for the GA-HDTV to the D3 VTR and the third is for the HDVCR to D3 VTR. This interface is also designed to accept both 8 VSB and 16 VSB modes. It is expected that this paper to be valuable in bringing the compressed HDTV recoding technology into television studios, cable head ends and consumer homes.

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Hardware Design and Implementation of Discrete Wavelet Transform Using Pipelining (파이프라인을 이용한 이산 웨이블렛 변환 하드웨어 설계 및 구현)

  • Kim, Seok;Yi, Kang
    • Proceedings of the Korean Information Science Society Conference
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    • 2007.06b
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    • pp.381-384
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    • 2007
  • 본 논문에서는 최신 정지영상 압축표준인 JPEG2000에 이용되는 알고리즘인 이산 웨이블렛 변환(이하이산 웨이브릿 변환)을 위한 전용 하드웨어의 파이프라인 설계를 제안한다. 본 연구에서는 3-level 이산 웨이브릿 변환기를 효과적으로 설계하기 위해서 파이프라라인 기법으로 데이터의 처리속도를 개선하였다. Xilinx FPGA를 대상으로 한 실험 결과 면적은 약 24%증가된 반면에 throughput은 약 50%정도 향상되었다.

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Image Compression System Implementation Based on DWT (DWT 기반 영상압축 시스템 구현)

  • 서영호;최순영;김동욱
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.40 no.5
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    • pp.332-346
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    • 2003
  • In this paper, a system which can compress and reconstruct the digital image was implemented using 2 dimensional DWT(Discrete Wavelet Transform). The proposed system consists of the FPGA board tocompress the image and the application software(S/W) to reconstruct it. First the FPGA receives the image from AID converter and compresses the image using wavelet transform. The compressed data is transferred into the PC using the PCI interface. The compressed image is reconstructed by an application S/W inside the PC. The image compressor can compress about 60 fields per second, in which the image format was NTSC YCbCr(4:2:2) and the image size was 640${\times}$240 pixels per field. The designed hardware mapped into one FPGA occupying 11,120 LAB (Logic Array Block) and 27,456 ESB(Embedded System Block) in APEX20KC EP20K1000B652-7. It globally uses 33MHz clock and the memory control part uses 100MHz.

A Study on fast LIFS Image Coding Using Adaptive Orthogonal Transformation (적응 직교변환을 이용한 LIFS 부호화의 고속화에 관한 연구)

  • 유현배;박경남;박지환
    • Journal of Korea Multimedia Society
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    • v.7 no.5
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    • pp.658-667
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    • 2004
  • For digital image compression, various fractal image coding schemes using the self-similarity of image have been studied extensively. This paper discusses the problem that occurs during the calculating process of adaptive orthogonal transformation and provides improvements of LIFS coding scheme using the transformation. This proposed scheme has a better performance than JPEG for a wide range of compression ratio. This research also proposes an image composition method consisting of all domains of the transformation. The results show that the arithmetic operation processes of the encoder and the decoder become much smaller even without the distortion of the coding performance.

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