• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.32 no.7
• /
• pp.1-12
• /
• 2004

A flow visualization of the 1st cycle motion of a fling-clapping wing that might be employed by butterflies during flight is performed. In this numerical flow visualization, he time-dependent Navier-Stokes equations are solved for two wing motion types; 'fling followed by clap and pause' and 'clap followed by fling and pause'. The result is observed regarding the main flow features such as the sequential development of the two families of separation vortex pairs and their movement. For the fling followed by clap and pause motion, a strong separation vortex pair of counter-clockwise develops in the opening between the wings in the fling phase and they then move out from the opening in the following clap phase. For the clap followed by fling and pause motion, the separation vortex pair developed in the outside space in the clap phase move into the opening in the following fling phase. The separation vortex pair in the opening developed in the fling phase of the clap followed by fling and pause motion is observed to be stronger than that in the opening developed in the fling phase of the fling followed by clap and pause motion.

• Journal of the Korean Magnetics Society
• /
• v.23 no.2
• /
• pp.49-53
• /
• 2013

A current sensor is one of important component which is used for the electrical current measurement during charge and discharge of the battery, and monitoring system of the motor controller in the electric and hybrid vehicle. In this study, we have developed an open loop type current sensor using GaAs Hall sensor and magnetic core has an air gap. The Hall sensor detect magnetic field produced by the current to be measured. The 3 mm air gap core was made by HGO electrical steel sheets after slitting, winding, annealing, molding, and cutting. Developed current sensor shows 0.03 % linearity within DC current range from -400 A to +400 A. Operating temperature range was extended to the range of $-40{\sim}105^{\circ}C$ using temperature compensating electronic circuit. To Improve frequency bandwidth limit due to the air flux of PCB (Printed Circuit Board) and Hall sensor, We employed an air flux compensating loop near Hall sensor or on PCB. Frequency bandwidth of the sensor was 100 kHz when we applied sine wave current of $40A{\cdot}turn$ in the frequency range from 100 Hz to 100 kHz. For the dynamic response time measurement, 5 kHz square wave current of $40A{\cdot}turn$ was applied to the sensor. Response time was calculated time reach to 90 % of saturation value and smaller than $2{\mu}s$.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.19 no.1
• /
• pp.149-155
• /
• 2015

This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.15 no.2
• /
• pp.144-151
• /
• 2022

In this paper, a 1.5V 256kb eFlash memory IP with low area DC-DC converter is designed for battery application. Therefore, in this paper, 5V NMOS precharging transistor is used instead of cross-coupled 5V NMOS transistor, which is a circuit that precharges the voltage of the pumping node to VIN voltage in the unit charge pump circuit for the design of a low-area DC-DC converter. A 5V cross-coupled PMOS transistor is used as a transistor that transfers the boosted voltage to the VOUT node. In addition, the gate node of the 5V NMOS precharging transistor is made to swing between VIN voltage and VIN+VDD voltage using a boost-clock generator. Furthermore, to swing the clock signal, which is one node of the pumping capacitor, to full VDD during a small ring oscillation period in the multi-stage charge pump circuit, a local inverter is added to each unit charge pump circuit. And when exiting from erase mode and program mode and staying at stand-by state, HV NMOS transistor is used to precharge to VDD voltage instead of using a circuit that precharges the boosted voltage to VDD voltage. Since the proposed circuit is applied to the DC-DC converter circuit, the layout area of the 256kb eFLASH memory IP is reduced by about 6.5% compared to the case of using the conventional DC-DC converter circuit.