• Title/Summary/Keyword: 반송파복원

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Fast Carrier Recovery for High-Order QAM Systems (고차의 QAM 시스템을 위한 고속 반송파 복원)

  • Lee, Chul-Soo;Ahn, Jae-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.4C
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    • pp.371-376
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    • 2010
  • In this paper, we propose a new fast carrier recovery algorithm for high-order QAM systems. The proposed algorithm detects carrier frequency offset from the phase differences among the received symbols directly and combines it with the conventional carrier recovery, so that it is possible to achieve the carrier recovery with wide tracking range and fast acquisition time. Simulation results show that the proposed carrier recovery method reduces acquisition time at large frequency offset and low signal-to-noise ratio (SNR).

Design and fabrication of PSK carrier recovery circuit using multi-layer coupled line (다층형 결합 선로를 이용한 반송파 복원 회로 설계 제작)

  • Kim, Young-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.10
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    • pp.2039-2044
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    • 2009
  • The PSK carrier signal recovery circuit using multi-layer coupled line was analyzed and designed. The fabricated carrier recovery 6 port element with multi-layer coupled line structure gets the simple architecture. It is possible to implement the carrier signal recovery circuit of the same structure with the multi-layer six port phase correlator of the direct receiver front-end. Based on the analysis of RML carrier recovery circuit using the multi-layer coupled line 6-port phase correlator, the multi-layer coupled line carrier signal recovery structure for multi-mode coherent demodulation was proposed. The fabricated multi-layer coupled line carrier signal recovery circuit for quadrature phase shift-keying shows a good carrier signal characteristic with a constant phase and phase error below ${\pm}3o$.

Analysis of PSK Coherent Carrier Signal Recovery Circuit Using Six-Port Phase Correlator (6-단자 위상 상관기를 이용한 PSK 반송파 신호 복원 회로 해석)

  • Kim, Young-Wan;Shin, Choo-Yeon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.11
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    • pp.1281-1286
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    • 2008
  • The PSK carrier signal recovery circuit using a six-port phase correlator was analyzed and the circuit structure is proposed in this paper. The proposed carrier signal recovery circuit that is made of reflection element and six-port phase correlator, which is comprised of a power divider and three hybrid branch line couplers, give a simple structure and can be fabricated without no difficulty. The circuit recovers the carrier signal of BPSK and QPSK modulation signal. The proposed scheme can be utilized as a basis structure for high-mode PSK carrier signal recovery. By simulation results, the recovered signal by the proposed circuit shows a good carrier signal characteristic with CW signal of a constant phase($23.4^{\circ}$) and ${\pm}0.8^{\circ}$ phase error due to glitch conditions.

Design of Carrier Recovery Loop for Receiving Demodulator in Digital Satellite Broadcasting (디지털 위성방송 수신용 복조기를 위한 반송파 복원 회로 설계)

  • 하창우;이완범;김형균;김환용
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11B
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    • pp.1565-1573
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    • 2001
  • In order to resolve problems according to the phase error in QPSK demodulator in the digital satellite broadcasting, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the drawback of NCO of the conventional carrier recovery loop is to wastes a amount of power for the structure of Look-up table , we designed the structure of combinational logic without the Look-up table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the Look-up table is 175[${\mu}$W], NCO with the proposed structure is 24.65[${\mu}$W]. As the result, it is recognized that loss power is reduced about one eighth. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

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Design and Implementation of Carrier Recovery Loop for Satellite Telemetry and Tracking & Command (위성 관제용 반송파 복원부 설계 및 구현)

  • Lee, Jung-Su;Oh, Chi-Wook;Seo, Gyu-Jae;Oh, Seung-Han;Chae, Jang-Soo;Myung, Noh-Hoon
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.39 no.1
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    • pp.56-62
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    • 2011
  • A Satellite transponder is mounted on the Satellite and performs radio communications with the ground station. A Digital transponder compared to The analog transponder is made easy and accurate performance prediction. Also Modulation Scheme, Data Rate, Loop Bandwidth, Modulation Index and etc. can be changed on orbit, by implementing FPGA can reduce the weight and volume. The core technology of digital transponder is Carrier Recovery loop. Dynamic Range, Frequency Tracking Range, Frequency Tracking Rate and Coherent performance are determined by the performance of the Carrier Recovery loop. In this paper, we proposed the structure of Carrier Recovery loop for the Satellite digital transponder, then tested and verified the structure.

A Digital Carrier Recovery Scheme for Satellite Transponder (디지털방식의 위성 트랜스폰더 반송파 복원 방안 연구)

  • Lee, Yoon-Jong;Choi, Seung-Woon;Kim, Chong-Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.10A
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    • pp.807-813
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    • 2009
  • A Satellite transponder is the Communication system to process signal with up-link signal recovery, and transmit to ground station through down-link. The orbit flight in the deep space causes high doppler shift in the received signals from the ground station so that the Carrier recovery and fast synchronization system are essential for the transponder system. The conventional analog transponder is employing the system's carrier recovery along with the PLL (Phase Locked Loop) designed for satellite's operation. This paper presents a digital carrier recovery scheme which can provide more reliable and software reconfigurable implementation technique for satellite transponder system without verifying scheme along with transponder designed for short distance or deep space satellite.

Six-port direct conversion receiver front-end with carrier recovery circuit and phase shifter using multi-layer coupled line (다층형 결합 선로를 이용한 반송파복원기와 위상 변위기를 갖는 6-단자 직접 변환 수신 전처리부)

  • Kim, Young-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.11
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    • pp.2267-2272
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    • 2009
  • The six-port direct conversion receiver front-end that is comprised of a carrier recovery and a phase shifter, which gets the same structure with six-port phase correlator using the multi-layer coupled line, was designed and fabricated in this paper. The six-port element that is comprised of the power divider and the hybrid coupler is designed by multi-layer coupled line structure. The multi-coupled structure is utilized as the basic structure in receiver phase correlator, carrier recovery circuit and phase shifter. The receiver front-end with the same multi-layer coupled line structure for the receiver elements shows the simple structure and no difficulty in integration. The fabricated multi-layer coupled six-port receiver front-end re-generates the carrier signal with a constant phase and demodulates the PSK transmission signal.

A New Decision-Directed Carrier Recovery Algorithm (새로운 결정지향 반송파 복원 알고리즘)

  • 고성찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.7A
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    • pp.1028-1035
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    • 1999
  • To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.

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Frequency Synchronization Between Input and Output Signal for Digital On-Channel Repeater (동일채널중계기의 송수신신호 주파수 일치)

  • Eum, Ho-Min;Lee, Yong-Tae;Kim, Heung-Mook;Seo, Jae-Hyun;Park, Sung-Ik;Kim, Seung-Won
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 2005.11a
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    • pp.81-84
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    • 2005
  • 지상파 디지털 방송신호의 방송구역 확장이나 난시청지역 해소를 위해 사용되는 동일채널중계기(On-Channel Repeater : OCR)는 수신신호와 송신신호의 주파수를 완벽히 일치시켜야한다. 송수신신호의 주파수가 일치하지 않을 경우 주 송신신호와 중계신호가 동시에 수신되는 중첩지역에서 수신기의 수신성능이 현저히 저하되기 때문이다. 본 논문에서는 ATSC 지상파 디지털 방송신호를 중계하는 등화형 동일채널중계기(Equalization Digital On-Channel Repeater : EDOCR)에서 송수신신호의 주파수를 일치시키는 알고리즘에 대해 기술한다. 등화형 동일채널중계기는 주 송신신호를 수신하여 복조한 후 재 변조 하므로 송수신신호의 주파수를 일치시키기 위한 별도의 장치나 알고리즘이 반드시 사용되어야 한다. 제안하는 알고리즘은 주 송신신호의 동기복원 과정에서 획득한 주파수 오차 정보를 재 변조 과정에 사용함으로써 GPS와 같은 별도의 장치 없이 송수신신호의 주파수를 일치시킨다. 반송파 복원과정에서 획득한 반송파 오차와 심볼타이밍 복원과정에서 획득한 심볼타이밍 오차를 재 변조 신호에 추가하면 수신신호와 송신신호가 같은 주파수 오차를 갖게 되어 두 신호의 중심주파수가 일치된다.

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