• KIPS Transactions on Computer and Communication Systems
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• v.4 no.1
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• pp.15-22
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• 2015

Estimating the number of distinct values is really well-known problems in network data measurement and many effective algorithms are suggested. Recent works have built upon technique called Linear Counting to solve the estimation problem for massive sets or spreaders in small memory. Sampling is used to reduce the measurement data, and it is assumed that sampling gives bad effect on the accuracy. In this paper, however, we show that the sampling on multi-set estimation sometimes gives better results for CSE with sampling than for MCSE that examines all the packets without sampling in terms of accuracy and estimation range. To prove this, we presented mathematical analysis, conducted experiment with real data, and compared the results of CSE, MCSE, and CSES.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.3B
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• pp.339-348
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• 2004

Packet classification is an important factor to support various services such as QoS guarantee and VPN for users in Internet. Packet classification is a searching process for best matching rule on rule tables by employing multi-field such as source address, protocol, and port number as well as destination address in If header. In this paper, we propose hardware based packet classification algorithm by employing tree bitmap of multi-bit trio. We divided prefixes of searching fields and rule into multi-bit stride, and perform a rule searching with multi-bit of fixed size. The proposed scheme can reduce the access times taking for rule search by employing indexing key in a fixed size of upper bits of rule prefixes. We also employ a marker prefixes in order to remove backtracking during searching a rule. In this paper, we generate two dimensional random rule set of source address and destination address using routing tables provided by IPMA Project, and compare its memory usages and performance.

• Journal of Korea Multimedia Society
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• v.7 no.8
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• pp.1183-1194
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• 2004

Network partitioning problem is to partition a network into multiple blocks such that the size of cutset is minimized while keeping the block sizes balanced. Among these, iterative algorithms are regarded as simple and efficient which are based on cell move of Fiduccia and Mattheyses algorithm, Sanchis algorithm, or Kernighan and Lin algorithm. All these algorithms stipulate balanced block size as a constraint that should be satisfied, which makes a cell movement be inefficient. Park and Park introduced a balancing coefficient R by which the block size balance is considered as a part of partitioning cost, not as a constraint. However, Park and Park's algorithm has a square time complexity with respect to the number of cells. In this paper, we proposed Bucket algorithm that has a linear time complexity with respect to the number of cells, while taking advantage of the balancing coefficient. Reducing time complexity is made possible by a simple observation that balancing cost does not vary so much when a cell moves. Bucket data structure is used to maintain partitioning cost efficiently. Experimental results for MCNC test sets show that cutset size of proposed algorithm is 63.33% 92.38% of that of Sanchis algorithm while our algorithm satisfies predefined balancing constraints and acceptable execution time.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.4
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• pp.981-987
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• 2017

Proliferation of cloud computing services brings about reduction of the maintenance and management costs by allowing data to be outsourced to a dedicated third-party remote storage. At the same time, the majority of storage service providers have adopted a data deduplication technique for efficient utilization of storage resources. When a hash tree is employed for duplicate identification as part of deduplication process, size information of the attested data and partial information about the tree can be deduced from eavesdropping. To mitigate such side channels, in this paper, a new duplicate identification method is presented by exploiting a multi-set hash function.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.83-90
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• 2004

In this paper, we proposed a new instruction set(X32Y ISA) with 3 different types of instruction mode. The proposed instruction set organizes 32-bit, 24-bit, 16-bit instruction in order to solves a problem of memory size limitation in an embedded microprocessor. We designed a 32-bit 5 stage pipeline RISC microprocessor based on the X32V ISA. To verify the proposed the X32V ISA and a microprocessor, we estimated a program code size of multimedia application programs using a X32V simulator. In result, we verified that the Light mode and the Ultra Light mode obtains 8%, 27% reduction of a program code size through comparison with the Default mode. The proposed microprocessor was verified all X32V instructions execution at Xilinx FPGA with 33MHz operating frequency,

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.6
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• pp.732-736
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• 2010

Processing a large amount of data becomes more important than ever. Particularly, the information queries which require multi-dimensional record scan can be efficiently implemented with SIMD instruction sets. In this article, we present a SIMD record scan technique which employs row-based scanning. Our technique is different from existing SIMD techniques for predicate processes and aggregate operations. Those techniques apply SIMD instructions to the attributes in the same column of the database, exploiting the column-based record organization of the in-memory database systems. Whereas, our SIMD technique is useful for multi-dimensional record scanning. As the sizes of registers and the memory become larger, our row-based SIMD scan can have bigger impact on the performance. Moreover, since our technique is orthogonal to the parallelization techniques for multi-core processors, it can be applied to both uni-processors and multi-core processors without too many changes in the software architectures.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.9
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• pp.1754-1766
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• 2015

Packet classification carried out in Internet routers is one of the challenging tasks, because it has to be performed at wire-speed using five header fields at the same time. In this paper, we propose a leaf-pushed AQT bitmap trie. The proposed architecture applies the leaf-pushing to an area-based quad-trie (AQT) to reduce unnecessary off-chip memory accesses. The proposed architecture also applies a bitmap trie, which is a kind of multi-bit tries, to improve search performance and scalability. For performance evaluation, simulations are conducted by using rule sets ACL, FW, and IPC, with the sizes of 1k, 5k, and 10k. Simulation results show that the number of off-chip memory accesses is less than one regardless of set types or set sizes. Additionally, since the proposed architecture applies a bitmap trie, the required number of on-chip memory accesses is the 50% of the leaf-pushed AQT trie. In addition, our proposed architecture shows good scalability in the required on-chip memory size, where the scalability is identified by the stable change in the required memory sizes, as the size of rule sets increases.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.10
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• pp.61-67
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• 2016

With the current high distribution rate of smart devices and the recent development of computing technology, user interest in multimedia, such as photos, videos, and so on, has rapidly increased, which is a departure from the simple pattern of information retrieval. Because of these increasing interests, image processing techniques, which generate and process images for diverse applications, are being developed. In entertainment recently, there are some techniques that present a celebrity's image as a mosaic comprising many small images. In addition, studies into the mosaic technique are actively conducted. However, conventional mosaic techniques result in a long processing time as the number of database images increases, because they compare the images in the databases sequentially. Therefore, to increase search efficiency, this paper proposes an algorithm to generate a mosaic image using a discrete cosine transform (DCT) hash. The proposed photo mosaic-generation algorithm is composed of database creation and mosaic image generation. In database creation, it first segments images into blocks with a predefined size. And then, it computes and stores a DCT hash set for each segmented block. In mosaic generation, it efficiently searches for the most similar blocks in the database via DCT hash for every block of the input image, and then it generates the final mosaic. With diverse experimental results, the proposed photo mosaic-creation algorithm can effectively generate a mosaic, regardless of the various types of images and sizes.