• Smart Media Journal
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• v.3 no.1
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• pp.33-38
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• 2014

Even though the performance of microprocessor is improved continuously, the performance improvement of computing system becomes hard to increase, in order to some drawbacks including increased power consumption. To solve the problem, general-purpose computing on graphics processing units(GPGPUs), which execute general-purpose applications by using specialized parallel-processing device representing graphics processing units(GPUs), have been focused. However, the characteristics of applications related with graphics is substantially different from the characteristics of general-purpose applications. Therefore, GPUs cannot exploit the outstanding computational resources sufficiently due to various constraints, when they execute general-purpose applications. When designing GPUs for GPGPU, memory system is important to effectively exploit the GPUs since typically general-purpose applications requires more memory accesses than graphics applications. Especially, external memory access requiring long latency impose a big overhead on the performance of GPUs. Therefore, the GPU performance must be improved if hierarchical memory architecture which can reduce the number of external memory access is applied. For this reason, we will investigate the analysis of GPU performance according to hierarchical cache architectures in executing various benchmarks.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.331-340
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• 2021

As the communication industry develops, the development of SoC (System on Chip) is increasing. Accordingly, the paradigm of technology design of industries and companies is changing. In the existing process, companies purchased micro-architecture, but now they purchase ISA (Instruction Set Architecture), and companies design the architecture themselves. RISC-V is an open instruction set based on a reduced instruction set computer. RISC-V is equipped with ISA, which can be expanded through modularization, and an expanded version of ISA is currently being developed through the support of global companies. In this paper, we present benchmarking frameworks ARIA, LEA, and PIPO of Korean block ciphers in RISC-V. We propose implementation methods and discuss performance by utilizing the basic instruction set and features of RISC-V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8B
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• pp.509-520
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• 2007

In this paper, we propose a real-time sensor node platform that guarantees the real-time scheduling of periodic and aperiodic tasks through a multitask-based software decomposition technique. Since existing sensor networking operation systems available in literature are not capable of supporting the real-time scheduling of periodic and aperiodic tasks, the preemption of aperiodic task with high priority can block periodic tasks, and so periodic tasks are likely to miss their deadlines. This paper presents a comprehensive evaluation of how to structure periodic or aperiodic task decomposition in real-time sensor-networking platforms as regard to guaranteeing the deadlines of all the periodic tasks and aiming to providing aperiodic tasks with average good response time. A case study based on real system experiments is conducted to illustrate the application and efficiency of the multitask-based dynamic component execution environment in the sensor node equipped with a low-power 8-bit microcontroller, an IEEE802.15.4 compliant 2.4GHz RF transceiver, and several sensors. It shows that our periodic and aperiodic task decomposition technique yields efficient performance in terms of three significant, objective goals: deadline miss ratio of periodic tasks, average response time of aperiodic tasks, and processor utilization of periodic and aperiodic tasks.

• The KIPS Transactions:PartC
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• v.14C no.4
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• pp.371-382
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• 2007

In this paper, we propose a real-time sensor node platform that efficiently manages periodic and aperiodic tasks. Since existing sensor node platforms available in literature focus on minimizing the usage of memory and power consumptions, they are not capable of supporting the management of tasks that need their real-time execution and fast average response time. We first analyze how to structure periodic or aperiodic task decomposition in the TinyOS-based sensor node platform as regard to guaranteeing the deadlines of ail the periodic tasks and aiming to providing aperiodic tasks with average good response time. Then we present the application and efficiency of the proposed real-time sensor node platform in the sensor node equipped with a low-power 8-bit microcontroller, an IEEE802.15.4 compliant 2.4GHz RF transceiver, and several sensors. Extensive experiments show that our sensor node platform yields efficient performance in terms of three significant, objective goals: deadline miss ratio of periodic tasks, average response time of aperiodic tasks, and processor utilization of periodic and aperiodic tasks.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.6
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• pp.6-11
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• 2010

Amount of power generated from solar photovoltaic can vary according to solar flux of sunlight due to nature of solar cell panel, and an angle that the sun and the surface of cell makes brings difference in amount of power generation. Solar flux is decided by location of surface of the Earth that is classified into longitude and latitude, but on the other hand, an angle that the sung and the surface of cell makes can be changed by changing the angle of a solar power generation device at the fixed location. A method of changing the angle of a solar power generation device as a measure for improving practical power generation efficiency. and studies about a solar tracking device for this are in active. This study conducted a research on a solar tracking system for improvement of solar power generation efficiency. A solar tracking system of this study is composed of a sensor part to confirm a location of the sun with a semiconductor photosensor using the photo conductive effect, and it analyzed output signal of a sensor by using microprocessor and it produced a control signal of driving part for tracking the sun. A solar power generator (25W) was produced to analyze performance of a solar tracking system and usefulness of a solar tracking device that was designed and produced in this study was confirmed through experiments.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.8
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• pp.45-51
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• 2008

HID(High Intensity Discharge) search lamp for shipment requires a high open circuit and output current compare than vehicle. This paper presents a soft-start open circuit voltage and constant current sequence control method for 2.5[kW] HID search lamp. The proposed method controls the opal circuit voltage and discharge current of HID lamp according to ignition signal with a simple 8-bit micro-processor and PWM device. For the stable control of lamp, micro-processor checks the output voltage and current. And the checked signals are compared with ignition signal and changes the control mode for stable operation. An ignition signal and micro-processor change the control mode from open circuit voltage contort to constant current control. The proposed control scheme is verified from experimental tests of 2.5[kW] HID search lamp for shipment.

• Journal of Advanced Navigation Technology
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• v.21 no.4
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• pp.377-385
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• 2017

The solar cell need the characteristic interpreting because the solar cell changes greatly according to the isolation, temperature and load in the photovoltaic development. Moreover, to get many energy in photovoltaic development need the position tracking of the sun according to the environment change. Also, The solar cells should be operated at the maximum power point. In this paper, I used microprocessor and sensor and designed to improve the efficiency of the photovoltaic system the photovoltaic position tracker device, and compared the normal photovoltaic system of fixed form with the photovoltaic system of solar position tracked form. Moreover, compared the catalogue of solar cell module and the simulation through a mathematics modelling with the solar cell's characteristic interpreting and composed an power conversion system with boost converter and voltage source inverter. Used the constant voltage control method for maximum power point tracking in boost converter control and, used the SPWM(Sinusoidal Pulse Width Modulation) control method in inverter control. The result was less then 5% when compared the catalogue of solar cell module and the simulation through a mathematics modelling. The boost rate of boost converter was similar to 167 % with the simulation.

• Journal of KIISE
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• v.44 no.2
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• pp.115-123
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• 2017

A message processor is server software that receives non-realtime messages as well as realtime messages from clients that need to be processed within a deadline. With the recent advances of micro-processor technologies and Linux, the message processor is often implemented in Linux-based multi-core servers and it is important to use cores efficiently to maximize the performance of system in multi-core environments. Numerous research efforts on a real-time scheduler for the efficient utilization of the multi-core environments have been conducted. Typically, though, they have been conducted theoretically or via simulation, making a subsequent real-system application difficult. Moreover, many Linux-based real-time schedulers can only be used in a specific Linux version, or the Linux source code needs to be modified. This paper presents the design of a Linux-based message processor for multi-core environments that maps the threads to the cores at user level. The message processor is implemented through a modification of the traditional RM algorithm that consolidates the real-time messages into certain cores using a first-fit-based bin-packing algorithm; this minimizes the response-time delay of the non-real-time messages, while guaranteeing the violation rate of the real-time messages. To compare the performances, the message processor was implemented using the two multi-core-scheduling algorithms GSN-EDF and P-FP, which are provided by the LITMUS framework. The benchmarking results show that the response-time delay of non-real-time messages in the proposed system was improved up to a maximum of 17% to 18%.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.21 no.5
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• pp.10-24
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• 2007

In the dissertation, a power conversion system for fuel cell is composed of a PWM inverter with LC filter in order to convert fuel cell voltage to a single phase 220[V]. In addition, new insulated DC-DC converters are proposed in order that fuel cell voltage is boosted to 380[V]. In this paper, it requires smaller components than existing converters, which makes easy control. The proposed DC-DC converter controls output power by the adjustment of phase-shift width using switch $S_5\;and\;S_6$ in the secondary switch which provides 93-97[%] efficiency in the wide range of output voltage. Fuel cell simulator is implemented to show similar output characteristics to actual fuel cell. Appropriate dead time td enables soft switching to the range where the peak value of excitation current in a high frequency transformer is in accordance with current in the primary circuit. Moreover, appropriate setting to serial inductance La reduces communication loss arisen at light-load generator and serge voltage arisen at a secondary switch and serial diode. Finally, TMS320C31 board and EPLD using PWM switching technique to act a single phase full-bridge inverter which is planed to make alternating current suitable for household

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.41 no.4
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• pp.55-62
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• 2004

In this paper, we have developed a portable acceleration measurement system to measure acceleration signals during walking and a gait analysis algorithm which can evaluate gait regularity and symmetry and estimate gait parameters automatically. Portable acceleration measurement system consists of a biaxial accelerometer, amplifiers, lowpass filter with cut-off frequency of 16Hz, one-chip microcontroller, EEPROM and RF(TX/RX) module. The algerian includes FFT analysis, filter processing and detection of main peaks. In order to develop the algorithm, eight hemiplegic patients for training set and the other eight hemiplegic patients for test set are participated in the experiment. Acceleration signals during 10m walking were measured at 60 samples/sec from a biaxial accelerometer mounted between L3 and L4 intervertebral area. The algorithm, detected foot contacts and classified right/left steps, and then calculated gait parameters based on these informations. Compared with video data and analysis by manual, algorithm showed good performance in detection of foot contacts and classification of right/left steps in test set perfectly. In the future, with improving the reliability and ability of the algerian so that calculate more gait Parameters accurately, this system and algerian could be used to evaluate improvement of walking ability in hemiplegic patients in clinical practice.