• Journal of the Microelectronics and Packaging Society
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• v.24 no.1
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• pp.51-56
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• 2017

In this paper, we have developed a differential pressure flow sensor designed as a single capacitive type. And the sensor was fabricated using a MEMS process. Differential pressure flow sensors are the most commonly used sensors for industrial applications. The sensing diaphragm and bonding joint of the MEMS pressure sensor are easily broken at high pressure. In this paper, we proposed a structure in which the diaphragm of the sensor was not broken at a pressure exceeding the proof pressure, and the differential pressure sensor was designed and manufactured accordingly. The operating characteristics of the sensor were evaluated at a pressure three times higher than the sensor operating pressure (0-3 bar). The developed sensor was $3.0{\times}3.0mm$ and measured with a LCR meter (HP 4284a) at a pressure between 0 and 3 bar. It showed 3.67 pF at 0 bar and 5.13 pF at 3 bar. The sensor operating pressure (0-3 bar) developed a pressure sensor with hysteresis of 0.37%.

• Korean Journal of Optics and Photonics
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• v.17 no.1
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• pp.94-98
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• 2006

An optical microphone based on a dual-core fiber collimator and a membrane type micromirror serving as an optical head and a reflective diaphragm respectively was implemented. The micromirror diaphragm is suspended by a thin silicon bar linked with a frame, thus it is subject to a displacement induced by acoustic waves. The optical head incorporating two collimators integrated in a single housing gives light to and receives it from the diaphragm, rendering the optical microphone structure simple and compact. This dual-core collimator having a slowing varying beam profile facilitates the initial alignment of the optical head with the diaphragm, especially the distance between them. For the assembled microphone, the static characteristics were investigated tofind the operation point defined as the optimum distance between the head and the diaphragm, and a frequency response with a variation of about $\pm$5 dB for the range of up to 3kHz was achieved.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.13-17
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• 2003

In this study, new LTCC materials of $ZnWO_4$-LiF system were developed for the application to RF Module fabrication. Pure $ZnWO_4$ must be sintered above $1050^{\circ}C$ in order to obtain up to 98% of full density. The measured dielectric constant ($\epsilon_r$)quality factor ($Q{\times}f0$), and temperature coefficient of resonant frequency ($\tau_f$ were 15.5, 74000 GHz, and $-70ppm^{\circ}C$, respectively. LiF addition resulted in a liquid phase formation at 81$0^{\circ}C$ due to interaction between ZnWO$_4$ and LiF. Therefore, ZnWO$_4$ with 0.5∼1.5 wt% LiF could be densified at $850^{\circ}C$. In the given LiF addition range, the sintering shrinkage increased with increasing LiF content. Addition of LiF slightly lowered the dielectric constant from 15.5 to 14.2∼15 due to lower dielectric constant of LiF. Qxfo value decreased with increasing LiF content. This can be explained in terms of the interaction between LiF and $ZnWO_4$, and inhomogeneity of grain structure.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.3 s.40
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• pp.47-51
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• 2006

Recently, CMP (Chemical Mechanical Polishing) is one of very important processing in semiconductor technology because of large integration and application of design role. CMP is a planarization process of wafer surface using the chemical and mechanical reactions. One of the most important components of the CMP system is the polishing pad. During the CMP process, the pad itself becomes smoother and glazing. Therefore it is necessary to have a pad conditioning process to refresh the pad surface, to remove slurry debris and to supply the fresh slurry on the surface. A conditioning disk is used during the pad conditioning. There are diamonds on the surface of diamond disk to remove slurry debris and to polish pad surface slightly, so density, shape and size of diamond are very important factors. In this study, we characterized diamond disk with 9 kinds of sample.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.3
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• pp.31-35
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• 2014

$TiO_2$-nanoparticle-dispersed silicone was applied to a LED package and the light efficiency of the LED package was evaluated in this study. The addition of $TiO_2$ nanoparticles in silicone increased refractive index, which improved the light efficiency of the LED package. The $TiO_2$ nanoparticles were fabricated by hydrothermal synthesis and were dispsersed by a vinyl silane coating treatment. After the silane treatment, the $TiO_2$ nanoparticles dispersed with diameters of 10~40 nm but rod-shape $TiO_2$ nanoparticles with lengths of 100 nm were also observed. The refractive index increased with the $TiO_2$ concentration in silicone, while the transmittance decreased with the $TiO_2$ concentration. The light efficient of the LED package with $TiO_2$+silicone encapsulant was higher than that of the LED package with no $TiO_2$ in silicone encapsulant.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.4
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• pp.27-36
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• 2006

We fabricated thermally evaporated 10 nm-Ni/(poly)Si, 10 nm-Ni/l nm-Ir/(poly)Si and 10 nm-Ni/l nm-Pt/(poly)Si films to investigate the thermal stability of nickel monosilicides at the elevated temperatures by rapid annealing them at the temperatures of $300{\sim}1200^{\circ}C$ for 40 seconds. Silicides of 50 nm-thick were formed on top of both the single crystal silicon actives and the polycrystalline silicon gates. A four-point tester was used to examine sheet resistance. A scanning electron microscope and field ion beam were employed for thickness and microstructure evolution characterization. An X-ray diffractometer and an Auger depth profiler were used for phase and composition analysis, respectively. Nickel silicides with platinum have no effect on widening the NiSi stabilization temperature region. Nickel silicides with iridium farmed on single crystal silicon showed a low resistance up to $1200^{\circ}C$ while the ones formed on polycrystalline silicon substrate showed low resistance up to $850^{\circ}C$. The grain boundary diffusion and agglomeration of silicides lowered the NiSi stable temperature with polycrystalline silicon substrates. Our result implies that our newly proposed Ir added NiSi process may widen the thermal process window for nano CMOS process.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.111-119
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• 2005

Stack specimen with three dimensional interconnection structure through Cu via of $75{\mu}m$ diameter, $90{\mu}m$ height and $150{\mu}m$ pitch was successfully fabricated using subsequent processes of via hole formation with Deep RIE (reactive ion etching), Cu via filling with pulse-reverse electroplating, Si thinning with CMP, photolithography, metal film sputtering, Cu/Sn bump formation, and flip chip bonding. Contact resistance of Cu/Sn bump and Cu via resistance could be determined ken the slope of the daisy chain resistance vs the number of bump joints of the flip chip specimen containing Cu via. When flip- chip bonded at $270^{\circ}C$ for 2 minutes, the contact resistance of the Cu/Sn bump joints of $100{\times}100{\mu}m$ size was 6.7m$\Omega$ and the Cu via resistance of $75{\mu}m$ diameter, $90{\mu}m$ height was 2.3m$\Omega$.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.1-7
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• 1999

We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.10
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• pp.1409-1415
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• 2021

The Gysel divider has the advantage of easily setting the resistor in the circuit. If the line impedance in the Gysel divider is set differently, the input signal can be distributed to the two output ports at various distribution ratios. This paper proposes the Gysel divider that can change the power distribution to 1:3 or 3:1 by changing the line impedance. The impedance change of the line can be implemented by placing a floating copper plate on the bottom of the microstrip-line. When the floating copper plate and the ground plane are connected, the line operates as the microstrip-line, and when the floating copper plate and the ground plane are disconnected, the line operates as the coplanar-line. The proposed Gysel divider was fabricated at the center frequency of 1.5GHz. The fabricated 3:1 Gysel divider has a stable value S₁₁ of below -17dB, S₂₁/S₃₁ of 4.8±0.2dB, S₂₁(to high output port) of -1.39±0.12dB and S₃₁(to low output port) of -6.15±0.08dB over 1.3~1.7GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.2
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• pp.192-201
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• 2003

In this paper, to reduce the size of patch, three types of 3-dimensional patch antennas which are one-directionally-corrugaged type, rectangular ring-likely corrugated type, and lattice-likely corrugated type rectangular microstrip patch antennas(MPA) are designed and fabricated at the 1.575 GHz. As the result, one-directionally corrugated rectangular MPA is reduced in the resonant length of patch by 21.4% than that of general plane MPA. -10 dB bandwidth(B.W) is 62 MHz(3.9 %) and this is broader than that(39 MHz, 2.5 %) of plane MPA by 23 MHz(1.5 %). The gain is 5.8 dBd and this is reduced by 0.9 dB than that(6.7 dBd) of plane MPA. Half power beamwidth(HPBW) is broadened by 18$^{\circ}$ than that of plane MPA in the E-plane and this is due to the reduced length of patch. For rectangular ring-likely corrugated retangular MPA, the patch size is miniaturized by 21.6 % than that of plane MPA. For lattice-likely corrugated rectangular MPA, in the linear polarization, the size of patch is miniaturized by 43.3 % than that of plane MPA. -10 dB B.W is 70 MHz(4.4 %) and this is broadened than that of plane MPA by 31 MHz(2 %). Gain is 2.2 dBd and this is smaller than that of plane MPA by 4.5 dB. HPBW is increased in both E-plane and H-plane by 22$^{\circ}$ and 13$^{\circ}$, respectively. For circular polarization, the size of patch is reduced by 41 % than that by 41 %. The axial ratio(AR) is 0.8 dB at the 1.575 GHz and the axial ratio bandwidth(ARBW) within 2 dB is 20 MHz(1.27 %) and this is increased by 10 MHz(0.63 %) than that 10 MHz(0.63 %) of plane MPA. From all the results above, it is conformed that the proposed antenna has merit in size reduction of patch and in the input impedance B.W, and is more profitable in many application than the general plane type MPA.