• Journal of Korea Society of Industrial Information Systems
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• v.17 no.3
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• pp.9-17
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• 2012

In this paper, we propose a SPN 256 bit block cipher so called XSB(eXtended SPN Block cipher) which has a symmetric structure in encryption and decryption. The proposed XSB is composed of the even numbers of N rounds where the first half of them, 1 to N/2-1 round, applies a pre-function and the last half of them, N/2+1 to N round, employs a post-function. Each round consists of a round key addition layer, a substiution layer, a byte exchange layer and a diffusion layer. And a symmetry layer is located in between the pre-function layer and the post-function layer. The symmetric layer is composed with a multiple simple bit slice involution S-Boxes. The bit slice involution S-Box symmetric layer increases difficult to attack cipher by Square attack, Boomerang attack, Impossible differentials cryptanalysis etc.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.15 no.3
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• pp.103-107
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• 2005

Impossible differential attacks on AES have been proposed up to 6-round which requires $2^{91.5}$ chosen plaintexts and $2^{122}$ 6-round AES encryptions. In this paper, we introduce various 4-round impossible differentials and using them, we propose improved impossible differential attacks on 6-round AES. The current attacks require $2^{83.4}$ chosen plaintexts and $2^{105.4}$ 6-round AES encryptions to retrieve 11 bytes of the first and the last round keys.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.4
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• pp.37-44
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• 2008

The 128-bit block cipher SMS4 which is used in WAPI, the Chinese WALN national standard, uses a 128-bit user key with the number of 32 rounds. In this paper, we present a differential attack on the 20-round SMS4 using 16-round differential characteristic. This attack requires $2^{126}$ chosen plaintexts with $2^{105.85}$ 20-round SMS4 decryptions. This result is better than any previously known cryptanalytic results on SMS4 in terms of the numbers of attacked rounds.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.3
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• pp.427-433
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• 2002

This paper describes a design of cryptographic processor that implements the AES(Advanced Encryption Standard) block cipher algorithm "Rijndael". To achieve high throughput rate, a sub-pipeline stage is inserted into the round transformation block, resulting that the second half of current round function and the first half of next round function are being simultaneously operated. For area-efficient and low-power implementation, the round block is designed to share the hardware resources in encryption and decryption. An efficient scheme for on-the-fly key scheduling, which supports the three master-key lengths of 128-b/192-b/256-b, is devised to generate round keys in the first sub-pipeline stage of each round processing. The cryptoprocessor designed in Verilog-HDL was verified using Xilinx FPGA board and test system. The core synthesized using 0.35-${\mu}{\textrm}{m}$ CMOS cell library consists of about 25,000 gates. Simulation results show that it has a throughput of about 520-Mbits/sec with 220-MHz clock frequency at 2.5-V supply.-V supply.

• Journal of the Korea Convergence Society
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• v.8 no.11
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• pp.271-277
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• 2017

In the image processing, foreground image extraction is mainly applied to recognize a moving object or an object. In the game, the objects included in the foreground image can be mainly characters, non player characters, items, and the like. These objects can be the player's primary concern with objects that are the target of players' movement, attack, defense, and collection. In this background, this research is a study to extract players' interest areas. To this end, first, the foreground image is extracted. Second, the extracted foreground image is accumulated for a certain period of time, and the image is displayed as a result image. The accumulated foreground image according to the play time helps to know the location and frequency of screen appearance of game objects. This study can help players design their interest areas and design an efficient UX/UI.

• Journal of the Korean Society of Propulsion Engineers
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• v.15 no.6
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• pp.47-55
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• 2011

The present paper deals with numerical analysis to investigate the effect of rounded tube on the pressure drop and heat transfer in a compact tubular heat exchanger designed for high temperature and high pressure system. The pressure drop and heat transfer in the tubular heat exchanger greatly depend on the location of rounded tubes. The effect of locations of the rounded tubes was also analyzed. Three different locations which were tube inlet, tube outlet, and inlet&outlet were considered. In this paper, the tube with a rounded inlet&outlet showed the minimum pressure drop with decreased heat transfer while the tube with a rounded outlet showed better characteristics of pressure drop and heat transfer compared with the results of original model.

• Tunnel and Underground Space
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• v.25 no.6
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• pp.534-542
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• 2015

Round trip activity occurs discretely due to the abrasion of drill bit in the deep drilling project. Round trip has great impact on the drilling performance because it takes more time to change a drill bit as the depth goes deeper. Therefore, a reliable prediction technology of the round trip should be secured for feasibility analysis and effective management of the drilling project. Lee et al. (2013) developed the TOSA (round trip occurrence simulation algorithm) which can analyze the depth and timing of round trip occurrence at each abrasion state of bit. However, TOSA has weakness that it takes long time for simulation because the number of simulation increase exponentially as increasing the number of simulation section. This study developed the TOSA based round trip performance prediction module using genetic algorithm for simulating in a short time and verified simulation results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.7
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• pp.1524-1531
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• 2004

This study analyzes a load balancing technique using Round Robin Algorithm. The study uses two software packages (Packet Capture and Round Robin Test Package) to check packet volume from Virtual Network structure (data generator, virtual server, Server1,2,3), and finds out traffic distribution toward Server1,2 and 3. The functions of implemented Round Robin Load Balancing Monitoring System include round robin testing, system monitoring, and graphical indication of data transmission and packet volume. As the result of the study shows, Round Robin Algorithm allows servers to ensure definite traffic distribution, unless incoming data loads differ much. Although error levels are high in some cases, they were eventually alleviated by repeated tests for a long period of time.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.5
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• pp.37-47
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• 2004

The security of personal informations has been an important issue since the field of smart card applications has been expanded explosively. The security of smart card is based on cryptographic algorithms, which are highly required to be implemented into hardware for higher speed and stronger security. In this paper, a SEED cryptographic processor is designed by employing one round key generation block which generates 16 round keys without key registers and one round function block which is used iteratively. Both the round key generation block and the F function are using only one G function block with one 5${\times}$l MUX sequentially instead of 5 G function blocks. The proposed SEED processor has been implemented such that each round operation is divided into seven sub-rounds and each sub-round is executed per clock. Functional simulation of the proposed cryptographic processor has been executed using the test vectors which are offered by Korea Information Security Agency. In addition, we have evaluated the proposed SEED processor by executing VHDL synthesis and FPGA board test. The die area of the proposed SEED processor decreases up to approximately 40% compared with the conventional processor.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.12 no.4
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• pp.77-85
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• 2002

We present the impossible differential cryptanalysis of the block cipher XTEA[7] and TEA[6]. The core of the design principle of these block ciphers is an easy implementation and a simplicity. But this simplicity dose not offer a large diffusion property. Our impossible differential cryptanalysis of reduced-round versions of XTEA and TEA is based on this fact. We will show how to construct a 12-round impossible characteristic of XTEA. We can then derive 128-bit user key of the 14-round XTEA with $2^{62.5}$ chosen plaintexts and $2^{85}$ encryption times using the 12-round impossible characteristic. In addition, we will show how to construct a 10-round impossible characteristic or TEA. Then we can derive 128-bit user key or the 11-round TEA with $2^{52.5}$ chosen plaintexts and $2^{84}$ encryption times using the 10-round impossible characteristic.