• Title/Summary/Keyword: 디지털 회로 설계

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MAC for MIMO Nonlinear System with Delayed Input (시간지연 MIMO 비선형시스템의 MAC 제어기 설계)

  • Zhang, Yuanliang;Kim, Hong-Chul;Chong, Kil-To
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.52-60
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    • 2009
  • This paper proposes a digital controller for a nonlinear multi-input/multi-output(MIMO) system with time-delayed input. A nonlinear system with multi-input time delay is discretized using Taylor's discretization method, and the discretized system can be converted into a general nonlinear system. Consequently, general nonlinear controller synthesis can be applied to the discretized time-delay system We adopted MAC controller synthesis and verified the performance of the proposed method by conducting computer simulations. The results of the simulation showed that the proposed controller synthesis performs well and the proposed method is useful for controlling a nonlinear time-delay system.

Performance Analysis and Design of Fir ADM Digital Filters (FIR ADM 디지털 필터의 성능 해석 및 설계)

  • 선우종성;은종관
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.4
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    • pp.38-48
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    • 1982
  • Performance and realization of finite impulse response (FIR) digital filters that use an adaptive delta modulator (ADM) as an analog/digital converter have been studied. This filter requires no multiplication and offers many advantages over conventional PCM filters in low power consumption, small size, and cost effectiveness. Analytical formulas have been derived for the expected mean-squared errors and also for the word length necessary to achieve the desired performance. Computer simultation has been done to optimize the parameter values and to verify the results of performance analysis. In addition, design of FIR ADM digital filters for processing single and multi-channel signals has been considered.

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A Design and Implement Vessel USN Risk Context Aware System using Case Based Reasoning (사례 기반 추론을 이용한 선박 USN 위험 상황 인식 시스템 구현 및 설계)

  • Song, Byoung-Ho;Lee, Seong-Ro
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.3
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    • pp.42-50
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    • 2010
  • It is necessary to implementation of system contain intelligent decision making algorithm considering marine feature because existing vessel USN system is simply monitoring obtained data from vessel USN. In this paper, we designed inference system using case based reasoning method and implemented knowledge base that case for fire and demage of digital marine vessel. We used K-Nearest Neighbor algorithm for recommend best similar case and input 3.000 EA by case for fire and demage context case base. As a result, we obtained about 82.5% average accuracy for fire case and about 80.1% average accuracy for demage case. We implemented digital marine vessel monitoring system using inference result.

A digital Controller Design to Improve Steady-State characteristics (전상상태 특성을 개선한 디지털 제어기 설계)

  • Kim, Yeong-Gil;Park, Mi-Yong;Lee, Sang-Bae
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.6
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    • pp.1-6
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    • 1985
  • The reference input is one of causes having an effect upon the steady-state error. This paper dcscribes a design method of a digital controller to remove the stcadyftate error caused by the reference input. According to the types of the reference input, new system equations to remove the reference input term from controlled system equations are derived first. And, using the optimal control theory the control law is obtained to minimize the output of the new system. Based on the state-space approach, the proposed control algo-rithm can be applied to time-invariant linear systems including the unstable systems.

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Design and Implementation of USB Module for Foot Switch (풋 스위치용 USB 모듈 설계 및 구현)

  • Lee, Jong-Hyeok
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.8
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    • pp.1849-1854
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    • 2010
  • As for information system in hospital which digital hospital aims at, there are PACS(Picture Archiving and Communication System) and soon. PACS transfer and store various medical pictures which are occurring in hospital. The various medical pictures is captured by using keyboard or foot switch during a surgical operation. In this paper, foot switch USB module that can be mounted into a main foot switch case is designed and implemented, it is having a MCU circuit with a built-in micro-controller and a I/O interface having a maximum of five switch. we also developed foot switch control software program with various functions. The result of using the module in the hospital field confirms that the module operates safely.

FPGA Implementation of Doppler Invarient Low Power BFSK Receiver Using CORDIC (CORDIC을 이용한 도플러 불변 저전력 BFSK 수신기의 FPGA구현)

  • Byon, Kun-Sik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.8
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    • pp.1488-1494
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    • 2008
  • This paper is to design and implement a low power noncoherent BFSK receiver intended for future deep space communication using Xilinx System generator. The receiver incorporates a 16 point Fast Fourier Transform(FFT) for symbol detection. The design units of the receiver are digital design for better efficiency and reliability. The receiver functions on one bit data processing and supports main data rate 10kbps. In addition CORDIC algorithm is used for avoiding complex multiplications while computing FFT and multiplication of twiddle factor for low power is substituted by rotators. The design and simulation of the receiver is carried out in Simulink then the Simulink model is translated to the hardware model to implement FPGA using Xilinx System Generator and to verify performance.

Implementation of Header Parser Module for JPEG Baseline Decoder (JPEG 베이스라인 디코더용 헤더 파서 모듈 구현)

  • Noh, Si-Chan;Sonh, Seung-Il;Oh, Seung-Ho;Lee, Min-Soo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.747-750
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    • 2008
  • JPEG(Joint Photographic Expert Group)은 손실 압축 기법을 사용하여 데이터 양을 20:1 이상으로 현저히 줄이면서도 원 영상과 거의 유사한 영상을 복원할 수 있도록 해주기 때문에, 요즘 디지털 카메라 및 휴대폰 등 영상을 저장할 매 대부분 Exif(Exchangeable image file format)로 JPEG 압축형식을 널리 사용하고 있다. 본 논문은 JPEG 베이스라인 모드로 압축되어진 영상의 디코딩 단계에서 필요한 비계층형 헤더를 파싱하는 모듈의 기능을 소프트웨어로 모델링하고 VHDL을 이용하여 회로를 합성하고 동작을 검증하였다. 설계 결과 Xilinx xc3s1000 fg676-4 환경에서 154.488MHz의 동작속도를 나타내었고, JPEG 디코더의 고속 데이터 처리에 적응 가능하다.

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Design of a Digital Neuron Processor Using the Residue Number System (잉여수 체계를 이용한 디지털 뉴론 프로세서의 설계)

  • 윤현식;조원경
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.10
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    • pp.69-76
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    • 1993
  • In this paper we propose a design of a digital neuron processor using the residue number system for efficient matrix.vector multiplication involved in neural processing. Since the residue number system needs no carry propagation for modulus operations, the neuron processor can perform multiplication considerably fast. We also propose a high speed algorithm for computing the sigmoid function using the specially designed look-up table. Our method can be implemented area-effectively using the current technology of digital VLSI and siumlation results positively demonstrate the feasibility of our method. The proposed method would expected to adopt for application field of digital neural network, because it could be realized to currently developed digital VLSI Technology.

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A Design of 2-D Zero-Phase IIR Digital Filter with Narrow Transition Band (협대역 변이영역을 갖는 2차원 영위상 IIR 디지털 필터의 설계)

  • 김훈학;연형태;이근영
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.12
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    • pp.1940-1946
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    • 1990
  • In this paper, we are proposed a 2-D zero-phase IIR second-order filter which have separable denominators. The filter combines the advantages of the separable denominator and the simplicity of the McClellan transform. Generally, the McClellan transformation is not suitable for IIR filter because the 1-D to 2-D substibution can not be achieved easily in most of denominators. So we have designed the second order denominator using a separable condition via a first order McClellan transformation. The implementation of a higher order filter can be achieved by cascading such second order parts with different coefficients in denominator. As a result, we have suppressed the ripples in stopband and obtained the narrow transition band.

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FTTC/VDSL 가입자 전송기술

  • 임기홍;김기호;심창섭;임종대
    • Information and Communications Magazine
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    • v.15 no.7
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    • pp.169-179
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    • 1998
  • 본 논문에서는 현재 연구 개발되고 있는 Fiber-to-the-curb / Very high-rate digital subscriber line(FTTC/VDSL) 시스템의 DAVIC 표준 가입자 전송 기술인 51.84 Mb/s 16-CAP (Carrierless AM/PM) 전송시스템 (downstream)과 1.62 Mb/s QPSK burst-mode TDMA 전송시스템 (upstream)및, 타이밍 복원회로 등의 동작 원리 및 구조를 간략하게 기술하였다. 본 논문은 FTTC/VDSL 전송시스템 개발을 위하여 전체시스템이 운영될 환경, 즉 채널에 대하여 기술한 후, 주어진 채널에 적합한 down-stream전송시스템 알고리즘 및 구조를 설명하였으며, 타이밍 복원 시스템을 기술하였다. FTTC/VDSL시스템은 네트워크의 한 개의 송수신부가 가입자 댁내의 여러 개의 set-top box와 데이터를 주고받는 점 대 다점 (point-to-multipoint) 구조로 이루어져 있으며, 따라서 역 방향 (upstream) 채널 데이터 전송을 위한 QPSK 전송시스템은 네트워크쪽의 QPSK 수신부가 가입자 댁내의 여러개의 QPSK 송신부를 서비스할 수 있게끔 시분할 다중접속 방식인 burst-mode TDMA전송방식으로 구현되었다. FTTC/VDSL 전송시스템은 DAVIC의 시스템 성능 요구조건을 만족하게 설계되었으며, 모든 기능은 디지털로 구현되었고 칩 구현을 위하여 각 기능의 VLSI 시스템 파라메타 들을 추출하고 성능 시험을 실시하였다.

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