• The Journal of Korean Association of Computer Education
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• v.10 no.4
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• pp.17-25
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• 2007

In this paper, the simplification procedure of Karnaugh Map, which is essential to design digital logic circuits, was implemented as a web-based educational tool by Java applet. The learners can make virtual experiments on the simplification of the digital logic circuit by clicking on some buttons or filling out some text fields. The proposed simplification procedure was implemented as a Java applet which is based on the Modified Quine-McCluskey algorithm. Thus, the implemented Java applet will enable the learners to enhance the learning efficiency as a auxiliary educational tool.

• The Journal of the Convergence on Culture Technology
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• v.7 no.1
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• pp.558-563
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• 2021

Quantum-Dot Cellular Automata is a next-generation nanocircular design technology that is drawing attention from many research organizations not only because it is possible to design efficient circuits by overcoming the physical size limitations of existing CMOS circuits, but also because of its energy-efficient features. In this paper, one of the existing digital circuits, T flip-flop circuit, is proposed using QCA. The previously proposed T flip-flops are designed based on the majority gate, so the circuits are complex and have long delays. Therefore, the design of the XOR gate-based T flip-flop using cell interaction reduces circuit complexity and minimizes latency. The proposed circuit is simulated using QCADesigner, and the performance is compared and analyzed with the existing proposed circuits.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.167-174
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• 2012

In this paper a ultrasonic oil level meter for measuring oil levels of vehicle transmissions is designed and its effectiveness is shown by experiments. On a FPGA(Field Programmable Gate Array) project IDE(Integrated Development Environment), all digital circuits for the meter is designed using a FPGA, which enables simplicity and high performance of the meter as well as short developing time. Also, power supplying circuit and analog circuits to process low voltage ultrasonic echo signal are designed and simulated. Under experiments, the designed level meter is verified to provide accuracy to within 1mm.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.12
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• pp.69-77
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• 1999

This paper describes the design of fuzzy digital PID controller using simplified indirect inference method. First, the fuzzy digital PID controller is derived from the conventional continuous time linear digital PID controller. Then the fuzzification, control-rule base, and defuzzification using SIM in the design of the fuzzy digital controller are discussed in detail. The resulting controller is a discrete time fuzzy version of the conventional digital PID controller, which has the same linear structure, but are nonlinear functions of the input signals. The proposed controller enhances the self-tuning control capability, particularly when the process to be controlled is nonlinear. When the SIM is applied, the fuzzy inference results can be calculated with splitting fuzzy variables into each action component and are determined as the functional form of corresponding variables. So the proposed method has the capability of the high speed inference and adapting with increasing the number of the fuzzy input variables easily. Computer simulation results have demonstrated the superior to the control performance of the one proposed by D. Misir et al.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.7 no.3
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• pp.27-33
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• 1993

This paper presents the &tal controller for driving high frequency voltage fed PWM inverter that carrier frequency is over 2OkHz.We analyzed the conventional PWM to select a proper PWM pattern. as the result, obtained PWM pattern of the controller in which asynchronus staircase sinusoidal waveform is used as reference signal, and variable carrier ratio method was used for PWM control. The PWM controller is designed by fully digital method. Especially, Thk proposed controller is consisted of 8 bit one-chip microprocessor and digital logic. the former is for arithmetic and data processing, and the latter is for PWM pattern synthesis. Therefore, The responsibility and controllability is improved. Also, Data processing capability is improved using proper program to output modulation index with 9 bits. Circuits configuration of digital controller are made up of one chip 8051 and EPLD, and its controllability is tested by operating voltage fed inverter. Harmonics and current waveform is evaluated and analyzed for the voltage fed inverter system.

• Journal of The Korean Association of Information Education
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• v.6 no.3
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• pp.317-327
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• 2002

The need to support the ICT-using teaching and learning at elementary and secondary schools has led to various digital content service systems. The systems are designed to target the teachers and the students as the major users. The problems involved in them is that they do not provide such services as the integrated search and the systematic use of interface in terms of actual users' use of teaching and learning digital content. It's because they have been created at demands at each time. In an attempt to solve this problem, this study set out to suggest the integrated meta-data items of a teaching and learning digital content, which reflects the Dublin Core Education, the international meta-data standard. It also aimed to design an entity-relationship model to realize the digital content. The results of the integrated meta-data and the entity-relationship model will be utilized as a basic research to help the users to search for various teaching and learning digital contents on an integrated basis and to realize a consistent user interface. Furthermore, they are expected to contribute to the development a service system the teachers and the students can make better use of.

• Journal of Broadcast Engineering
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• v.26 no.4
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• pp.377-389
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• 2021

This paper presents a framework design of a digital twin system for a vertical smart farm. In this paper, a framework of digital twin systems establishes three factors: 1) Client 2) IoT gateway, and 3) Server. Especially, IoT gateway was developed using the Eclipse Ditto, which has been commonly used as the standard open hardware platform for digital twin. In particular, each factor is communicating with the client, IoT gateway, and server by defining the message sequence such as initialization and data transmission. In this paper, we describe the digital twin technology trend and major platform. The proposed design has been tested in a testbed of the lab-scale vertical smart-farm. The sensor data is received from 1 Jan to 31 Dec 2020. In this paper, a prototype digital twin system that collects environment and control data through a raspberry pi in a plant factory and visualizes it in a virtual environment was developed.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.9
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• pp.57-63
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• 1998

This paper describes a CMOS digital-to-analog converter to apply a newly-developed digital-to-analog conversion algorithm. The CMOS digital-to-analog converter has been designed by using 1.2$\mu\textrm{m}$ MOSIS SCMOS parameter and simulated for the performance. The simulated results have shown that the digital-to-analog converter has 200MHz of the maximum conversion rate, 7.41mW of the DC power consumption, and ${\pm}$0.08LSB of INL and ${\pm}$0.098LSB of DNL in 8-b.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.5
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• pp.587-592
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• 2015

According to increase in the use of the LED, the demand for low power consumption LED display design of the controller block has increased. In this paper, the low power LED controller block was designed through the power source supply that leads adiabatic operation from constant current source circuit operated by digital signal control. The proposed circuit was implemented using a 0.35um CMOS process. and it demonstrated linear operation of the circuit. From the simulation result, the proposed circuit was evaluated with about 82% power consumption reduction effect in comparison with conventional LED controller block. This research is expected to be helpful for the low power operation and the solution for heat problem of LED display.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.4
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• pp.33-39
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• 2014

In this paper, a new on-chip aging sensing circuit based on flip-flops is proposed to detect a circuit failure of MOSFET digital circuits casued by aging phenomenon such as HCI and BTI. The proposed circuit uses timing windows to warn against a guardband violation of sequential circuits, and generates three warning bits right before circuit failures occur. The generated bits can apply to an adaptive self-tuning method for reliable system design as control signals. The aging sensor circuit has been implemented using 0.11um CMOS technology and evaluated by $4{\times}4$ multiplier with power gating structure.