• Title/Summary/Keyword: 디지털 회로 설계

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Constraints on Implementations of Neural Networks with Analog VLSI Circuits (신경 회로망의 아날로그 VLSI 구현시 나타나는 문제점)

  • Oh, S.H.;Lee, Y.
    • Electronics and Telecommunications Trends
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    • v.9 no.1
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    • pp.75-80
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    • 1994
  • 신경회로망을 아날로그 VLSI로 구현하는 것은 디지털 구현방법에 비하여 집적도와 신호처리 속도의 장점이 있는 반면에 아날로그 신호의 저장 방법, 시냅스를 구현한 곱셈기의 비선형성, 동작영역, zero offset, noise, gain의 변동등의 문제가 존재한다. 여기서는, 이러한 문제들이 신경회로망을 구현한 아날로그 회로에서 어떤 형태로 나타나는지 알아보았다. 위와 같은 비이상적 요인들이 신경회로망의 성능에 미치는 영향이 파악되면 보다 더 신뢰성을 갖는 신경회로망 chip을 설계/제작할 수 있을 것이다.

Efficient C Code Generation for Logic Circuit Simulation (논리 회로 시뮬레이션을 위한 효율적인 C 코드 발생)

  • 한기영;표창우
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.10a
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    • pp.367-369
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    • 2001
  • 논리 회로는 하드웨어로 직접 구현할 수도 있으나, 설계된 디지털 논리를 프로그램으로 구현하고 이를 내장형 프로세서가 실행하게 하는 방식으로 구현할 수 있다. 이러한 구현은 내장형 시스템에 적합하도록 코드 크기와 실행 속도가 효율적이어야 한다. 본 논문에서는 복사 전파, 데드코드 삭제, 위상 정렬등의 컴파일러 최적화 기술과 함수 단위 모듈 개념을 도입하여 신호 흐름 분석 기법의 C 코드 자동 발생기를 구현하였다. 회로 시뮬레이션 구현 기법 중 유한 상태 천이 모델 기법으로 코드를 발생하는 Esterel 시스템과 성능 비교 실험을 한 결과, 코드 크기는 평균 84.17%로 감소되었으며 실행 속도는 평균 4.68배로 향상되었다.

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Design of High Speed Analog Input Card for Ultrasonic Testing (초음파 탐상을 위한 고속 아날로그 입력 카드의 설계)

  • 이병수;이동원;박두석
    • Journal of the Korea Society of Computer and Information
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    • v.5 no.4
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    • pp.62-68
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    • 2000
  • It was designed a high-speed analog input card that is a important device of ultrasonic testing flaw detector in the middle of non-destructive testing in this Paper. The A/D Board is inquired high-speed sampling rate and fast data acquisition system. This pater shows a design that has a function of Peak- Detection for ultrasonic testing by ISA Bus type and a 50MHz of A/D converter in order to do sampling more than quadruple frequency of transducer frequency.

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Incremental Delta-Sigma Analog to Digital Converter for Sensor (센서용 Incremental 델타-시그마 아날로그 디지털 변환기 설계)

  • Jeong, Jinyoung;Choi, Danbi;Roh, Jeongjin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.10
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    • pp.148-158
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    • 2012
  • This paper presents the design of the incremental delta-sigma ADC. The proposed circuit consists of pre-amplifier, S & H circuit, MUX, delta-sigma modulator, and decimation filter. Third-order discrete-time delta-sigma modulator with 1-bit quantization were fabricated by a $0.18{\mu}m$ CMOS technology. The designed circuit show that the modulator achieves 87.8 dB signal-to-noise and distortion ratio (SNDR) over a 5 kHz signal bandwidth and differential nonlinearity (DNL) of ${\pm}0.25$ LSB, integral nonlinearity (INL) of ${\pm}0.2$ LSB. Power consumption of delta-sigma modulator is $941.6{\mu}W$. It was decided that N cycles are 200 clock for 16-bits output.

Multi-Layer QCA 4-to-1 Multiplexer Design with Multi-Directional Input (다방위 입력이 가능한 다층구조 QCA 4-to-1 멀티플렉서 설계)

  • Jang, Woo-Yeong;Jeon, Jun-Cheol
    • The Journal of the Convergence on Culture Technology
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    • v.6 no.4
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    • pp.819-824
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    • 2020
  • In this paper, we propose a new multiplexer using quantum dot cellular automata (QCA), a next-generation digital circuit design technology. A multiplexer among digital circuits is a circuit that selects one of the input signals and transfers the selected input to one line. Since it is used in many circuits such as D-flip-flops, resistors, and RAM cells, research has been conducted in various ways to date. However, the previously proposed planar structure multiplexer does not consider connectivity, and therefore, when designing a large circuit, it uses an area inefficiently. There was also a multiplexer proposed as a multi-layer structure, but it does not improve the area due to not considering the interaction between cells. Therefore, in this paper, we propose a new multiplexer that improves 38% area reduction, 17% cost reduction, and connectivity using a cell-to-cell interaction and multi-layer structure.

Reed Solomon CODEC Design For Digital Audio/Video, Communication Electronic Devices (디지털 오디오/비디오, 통신용 전자기기를 위한 Reed Solomon 복부호기 설계에 대해)

  • An Hyeong-Keon
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.11
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    • pp.13-20
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    • 2005
  • For Modern Consumer and Communication Elecronic Devices, Always Error Protecting HW and SW is used. The Core is RS(Reed Solomon) Codec in Galois Field GF($2^8$). Here New 2 to 3 Symbol RS Decoder Design and Encoder design Method using Normalized error position Value is described. Examples are given to show the methods are working well.

Design and Implementation of a Web Courseware for Learning ‘Digital Circuit’ (‘디지털 회로’ 학습을 위한 웹 코스웨어의 설계와 구현)

  • 이진아;박연식;성길영
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.6
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    • pp.1236-1243
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    • 2003
  • In this paper, we designed and implemented a practice-oriented simulation-type web courseware to learn the ‘Digital Circuits’ subject effectively. The implemented web courseware utilized multimedia elements such as graphics, animations, and voices etc. for improving understanding and interaction of learning. Also, the web courseware could be easily updated a learning information by using database built in a web server system. In result, the implemented web courseware could encourage a learner with a motive of learning and improve effects of learning. Also, a learner can widely learn because we can add various contents to database according to need. Furthermore, the web courseware could improve understanding for learning by offering feedback on the result.

Digital Transmission and Isolation of Multichannel Analog Signals using a Single Optocoupler (옵토커플러의 절연을 이용한 멀티채널 아날로그 신호의 디지털 전송)

  • Nam, Jin Moon
    • The Journal of the Convergence on Culture Technology
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    • v.4 no.4
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    • pp.379-385
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    • 2018
  • The transmission of analog signals through Galvanic isolators often results in signal distortion. Optocoupler gain is temperature dependent and also varies considerably, which would cause deformations of analog signals. Digital isolators have better noise immunity than analog, and digital transmission is a cost-effective noise rejection method for multichannel analog signals, which can solve temperature-induced signal distortion problems. Digital data, converted from multichannel analog signals, can be transmitted through a single optocoupler. We proposed advanced circuits and data frame for robust transmission of multichannel analog signals. Numerical experiments were performed to investigate distortion of multichannel analog signals during transmission.

A Hysteresis Controllable Monolithic Comparator Circuit for the Radio Frequency Identification (RFID 히스테리시스 제어용 CMOS 비교기 IC 회로)

  • Kim, Young-Gi
    • Journal of IKEEE
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    • v.15 no.3
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    • pp.205-210
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    • 2011
  • A novel hysteresis tunable monolithic comparator circuit based on a 0.35 ${\mu}m$ CMOS process is suggested in this paper. To tune the threshold voltage of the hysteresis in the comparator circuit, two external digital bits are used with supply voltage of 3.3V. The threshold voltage of the suggested comparator circuit is controlled by 234mV by change of 4 digital control bits in the simulation, which is a close agreement to the analytic calculation.

A Design of Signal Processing Analog Front-End IC for Automotive Piezo-Resistive Type Pressure Sensor (Automotive Piezo-Resistive Type Pressure Sensor 신호 처리 아날로그 전단부 IC 설계)

  • Cho, Sunghun;Lee, Dongsoo;Choi, Jinwook;Choi, Seungwon;Park, Sanghyun;Lee, Juri;Lee, Kang-Yoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.8
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    • pp.38-48
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    • 2014
  • In this paper, a design of Signal Processing Analog Front-End IC for Automotive Piezo-Resistive Type Pressure Sensor is presented. In modern society, as the car turns to go from mechanical to electronic technology, the accuracy and reliability of electronic parts required importantly. In order to improve these points, Programmable Gain Amplifier (PGA) amplifies the received signal in accordance with gain for increasing the accuracy after PRT Sensor is operated to change physical pressure signals to electrical signals. The signal amplified from PGA is processed by Digital blocks like ADC, CMC and DAC. After going through this process, it is possible to determine the electrical signal to physical pressure signal. As processing analog signal to digital signal, reliability and accuracy in Analog Front-End IC is increased. The current consumption of IC is 5.32mA. The die area of the fabricated IC is $1.94mm{\times}1.94mm$.