• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2019.05a
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• pp.469-471
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• 2019

본 논문은 신호에 포함되어 있는 다양한 잡음을 효과적으로 제거할 수 있는 프로그램 가능한 디지털 유한 임펄스 응답 필터를 제안한다. 이러한 필터는 복잡도 등을 고려하여 3차 회로로 설계되어 있다. Altera사의 FPGA(Field Programmable Gate Array)인 cyclone II EP2C70F89618를 이용하여 설계하였다. 신호에 포함된 미세하고 다양한 잡음을 제거하기 위한 알고리즘을 개발하였다. 이를 바탕으로 필터 적용 후 출력 영상은 적용 전의 출력 영상에 비해 다양한 잡음에 대해 우수한 출력 영상을 확인하였다.

• The Journal of the Korea institute of electronic communication sciences
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• v.19 no.1
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• pp.31-38
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• 2024

The digital phase-locked loop(DPLL) is one of the circuits composed of a digital detector, digital loop filter, voltage-controlled oscillator, and divider as a fundamental circuit, widely used in many fields such as electrical and circuit fields. A state estimator using various mathematical algorithms is used to improve the performance of a digital phase-locked loop. Traditional state estimators have utilized Kalman filters of infinite impulse response state estimators, and digital phase-locked loops based on infinite impulse response state estimators can cause rapid performance degradation in unexpected situations such as inaccuracies in initial values, model errors, and various disturbances. In this paper, we propose a two-layer Frobenius norm-based finite impulse state estimator to design a new digital phase-locked loop. The proposed state estimator uses the estimated state of the first layer to estimate the state of the first layer with the accumulated measurement value. To verify the robust performance of the new finite impulse response state estimator-based digital phase locked-loop, simulations were performed by comparing it with the infinite impulse response state estimator in situations where noise covariance information was inaccurate.

• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.4
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• pp.591-598
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• 2021

The digital phase-locked loops(DPLL) is a circuit used for phase synchronization and has been generally used in various fields such as communication and circuit fields. State estimators are used to design digital phase-locked loops, and infinite impulse response state estimators such as the well-known Kalman filter have been used. In general, the performance of the infinite impulse response state estimator-based digital phase-locked loop is excellent, but a sudden performance degradation may occur in unexpected situations such as inaccuracy of initial value, model error, and disturbance. In this paper, we propose a minimum variance finite impulse response filter with optimal horizon for designing a new digital phase-locked loop. A numerical method is introduced to obtain the measured value interval length, which is an important parameter of the proposed finite impulse response filter, and to obtain a gain, the covariance matrix of the error is set as a cost function, and a linear matrix inequality is used to minimize it. In order to verify the superiority and robustness of the proposed digital phase-locked loop, a simulation was performed for comparison and analysis with the existing method in a situation where noise information was inaccurate.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.1
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• pp.57-65
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• 2017

This paper presented a method of designing low-power feedback active noise control filter optimized for headphones/earphones. Using constrained optimization, we obtained a high order FIR noise control filter to ensure reasonable noise attenuation performance at high sampling frequency environment. Then using infinite impulse response (IIR) approximation method called Balanced Model Truncation (BMT), we obtained a low order IIR noise control filter suitable for low-power digital signal processing system like headphones/earphones. For further performance improvement, we utilized frequency warping method so that we could obtain more accurately approximated IIR filter and we ensured system stability by reconstructing the low order IIR filter in form of cascaded second order IIR filters. ANC simulation with white noise and stability test verified that the proposed algorithm had superior attenuation performance and better robustness compared to the conventional algorithm.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.345-347
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• 2003

본 논문에서는 디지털 보호 계전기에 쓰이는 필터 중에서 최소 자승 알고리즘을 이용한 고성능 FIR 필터를 설계하였다. 기존의 DFT필터와 MATLAB 시뮬레이션을 이용하여 비교하였으며 FIR 필터의 VHDL모델 및 합성에 중점을 두었다. FIR 필터는 기본적으로 유한개의 임펄스 응답이 이루어지기 때문에 기타 다른 필터에 비하여 안정도가 높으며 선형적인 위상을 가지기 때문에 차단 주파수 대역의 왜곡현상을 없앨 수 있는 장점을 가지고 있다. 여러 가지 알고리즘으로 구현한 FIR 필터를 시뮬레이션 한 결과 최소 자승 알고리즘이 가장 우수한 결과를 나타내었다. 기본적으로 디지털 보호 계전기에서 디지털 필터의 기능은 사고 전압, 전류로부터 60Hz의 기본파 추출 CT, PT 왜곡 및 DC offset을 제거하는데 있다. 본 논문에서는 이러한 기능을 가지면서 샘플링 주파수와 차수를 같게 하여 FIR 필터와 DFT 필터의 주파수 응답과 연 산 속도를 비교 하였다. 본 논문에서 설계된 최소 자승 알고리즘을 이용한 FIR 필터는 같은 조건의 DFT필터에 비해 1고조파와 2고조파의 차이가 10db 이상 더 우수 하였으며 연산 속도 또한 2배 이상 좋은 결과를 보였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.10C
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• pp.995-1006
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• 2003

It is well know that in the wireless communication systems the transmitted signals can suffer from multipath fading due to the wave propagation characteristics and the obstacles over the paths, resulting in serious reduction in the power of the received signals. However, it is possible to take advantage of the inherent diversity imposed in the multipath reception if the underlying channel can be properly estimated. One of the diversity reception methods in this case is Rake processing. In this paper we study the Rake receivers for the direct-sequence spread-spectrum communication systems utilizing PN (pseudo noise) sequences to achieve spread spectrum. A conventional Rake receiver can use the finite-duration impulse (FIR) filter followed by the PN sequence demodulator, where the FIR filter coefficients are the reverse-ordered complex conjugate values of the fading channel impulse response estimates. Here, we propose a new Rake processing method by replacing the aforementioned PN code sequence with a new set of optimum demodulator coefficients. More specifically, the concept of the new optimum Rake processing is first introduced and then the optimum demodulator coefficients are theoretically derived. The performance obtained using the new optimum Rake processing is also calculated. The analytical results are verified by computer simulation. As a result, it is shown that the new optimum Rake processing method improves the MSE performance more than 10 dB over the conventional one using the fixed PN sequence demodulator. It is also shown that the new optimum Rake processing method improves the MSE performance about 10 dB over the Adaptive Correlator that performs the combining of the multipath components and PN demodulation concurrently. And finally, the MSE performance of the optimum Rake demodulator is very close to the MSE performance of OPSK demodulator under the AWGN channel.