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Design of Digital Phase-locked Loop based on Two-layer Frobenius norm Finite Impulse Response Filter

2계층 Frobenius norm 유한 임펄스 응답 필터 기반 디지털 위상 고정 루프 설계

  • 김신 (조선대학교 전자공학부) ;
  • 신성 (조선대학교 전자공학부) ;
  • 유성현 (조선대학교 전자공학부) ;
  • 최현덕 (전남대학교 ICT융합시스템공학과)
  • Received : 2023.12.29
  • Accepted : 2024.02.17
  • Published : 2024.02.29

Abstract

The digital phase-locked loop(DPLL) is one of the circuits composed of a digital detector, digital loop filter, voltage-controlled oscillator, and divider as a fundamental circuit, widely used in many fields such as electrical and circuit fields. A state estimator using various mathematical algorithms is used to improve the performance of a digital phase-locked loop. Traditional state estimators have utilized Kalman filters of infinite impulse response state estimators, and digital phase-locked loops based on infinite impulse response state estimators can cause rapid performance degradation in unexpected situations such as inaccuracies in initial values, model errors, and various disturbances. In this paper, we propose a two-layer Frobenius norm-based finite impulse state estimator to design a new digital phase-locked loop. The proposed state estimator uses the estimated state of the first layer to estimate the state of the first layer with the accumulated measurement value. To verify the robust performance of the new finite impulse response state estimator-based digital phase locked-loop, simulations were performed by comparing it with the infinite impulse response state estimator in situations where noise covariance information was inaccurate.

디지털 위상 고정 루프는 디지털 위상 검출기, 디지털 루프 필터, 디지털 제어 발진기, 분배기 등으로 이루어진 일반적인 회로로 전기 및 회로 분야 등 다양한 분야에서 널리 사용된다. 디지털 위상 고정 루프의 성능 향상을 위해 다양한 수학적인 알고리즘 등을 활용한 상태 추정기가 사용된다. 전통적인 상태 추정기로는 무한 임펄스 응답 상태 추정기의 칼만 필터를 활용해왔으며, 무한 임펄스 응답 상태 추정기 기반 디지털 위상 고정 루프는 초기값의 부정확성, 모델 오차, 다양한 외란 등의 예상치 못한 상황에서 급격한 성능 저하가 발생할 수 있다. 본 논문에서는 새로운 디지털 위상 고정 루프를 설계하기 위해 2계층 Frobenius norm 기반 유한 임펄스 상태 추정기를 제안한다. 제안한 상태 추정기는 첫 번째 층의 추정 상태를 이용하여 두 번째 층에서 상태 추정을 하는데, 이때 첫 번째 층의 추정 상태와 누적된 측정값과 결합하여 설계하였다. 새로운 유한 임펄스 응답 상태 추정기 기반 디지털 위상 동기 루프의 강인한 성능을 검증하기 위해 잡음 공분산 정보가 부정확한 상황에서 무한 임펄스 응답 상태 추정기와 비교하여 시뮬레이션을 수행하였다.

Keywords

Acknowledgement

본 논문은 교육부와 한국연구재단의 재원으로 지원을 받아 수행된 3단계 산학연협력 선도대학 육성 사업(LINC 3.0)의 연구결과입니다.

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