• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.10C
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• pp.933-941
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• 2006

In this paper, we proposed an efficient coding method for digital hologram (fringe pattern) acquired by a CCD camera or by computer generation using multi-view prediction technique and MPEG video compression standard technique. It proceeds each R, G, or B color component separately. The basic processing unit is a partial image segmented into the size of $N{\times}N$. Each partial image retains the information of the whole object. This method generates an assembled image for a row of the segmented and frequency-transformed partial images, which is the basis of the coding process. That is, a motion estimation and compensation technique of MPEG is applif:d to the reconstructed images from the assembled images with the disparities found during generation of assembled image and the original partial images. Therefore the compressed results are the disparity of eachpartial image to form the assembled image for the corresponding row, assembled image, and the motion vectors and the compensated image for each partial image. The experimental results with the implemented algorithm showed that the proposed method has NC (Normal Correlation) values about 4% higher than the previous method, by which ours has better compression efficiency. Consequently, the Proposed method is expected to be used effectively in the application areas to transmit the digital hologram data. can be identified in comparison with the previous researches and commercial IPs.

• Journal of Biomedical Engineering Research
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• v.19 no.6
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• pp.571-575
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• 1998

One of the most significant features of diagnostic ultrasonic instruments is to provide real time information of the soft tissues movements. Echocardiogram has been widely used for diagnosis of heart diseases since it is able to show real time images of heart valves and walls. However, the currently used ultrasonic images are deteriorated due to presence of speckle noises and image dropout. Therefore, it is very important to develop a new technique which can enhance ultrasonic images. In this study, a technique which extracts enhanced binary images in echocardiograms was proposed. For this purpose, a digital moving image file was made from analog echocardiogram, then it was stored as 8-bit gray-level for each frame. For an efficient image processing, the region containing the heat septum and tricuspid valve was selected as the region of interest(ROI). Image enhancement filters and morphology filters were used to reduce speckle noises in the images. The proposed procedure in this paper resulted in binary images with enhanced contour compared to those form the conventional threshold technique and original image processing technique which can be further implemented for the quantitative analysis of the left ventricular wall motion in echocardiogram by easy detection of the heart wall contours.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.36 no.2
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• pp.105-112
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• 2018

To determine the position of receiver, the GPS (Global Positioning System) uses position information of satellites and pseudo ranges based on signals. These are reflected by surrounding structures and multipath errors occur. This paper proposes a method for multipath error reduction using digital images to enhance the accuracy. The goal of the study is to calculate the shielding environment of receiver using image processing and apply it to GPS positioning. The proposed method, firstly, performs a preprocessing to reduce the effect of noise on images. Next, it uses hough transform to detect the outline of building roofs and determines mask angles and permissible azimuth range. Then, it classifies the satellites according to the condition using the image processing results. Finally, base on point positioning, it computes the receiver position by applying a weight model that assigns different weights to the classified satellites. We confirmed that the RMSE (Root Mean Square Error) was reduced by 2.29m in the horizontal direction and by 15.62m in the vertical direction. This paper showed the potential for the hybrid of GPS positioning and image processing technology.

• 한국HCI학회:학술대회논문집
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• 2006.02a
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• pp.124-129
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• 2006

음악은 소리를 즐긴다는 뜻을 담고 있다. 감상자에게 단순한 청각적 자극을 넘어 즐거움을 주기 위해선 음악적인 경험이 뒷받침되어야 한다. 가상 현실을 이용한 사용자와 시스템 간의 상호작용을 음악 경험 제공에 접목하려는 시도는, 새로운 경험을 통해 일반인들이 보다 쉽게 음악을 접하고 체험함으로써 음악을 통해 즐거움을 얻을 수 있도록 도움을 주는 데에 그 목적이 있다. 가상 오케스트라를 구현하고 지휘 동작을 재현하는 것은 이러한 가능성을 극대화하는 연구이다. 본 논문에서는 가상 오케스트라를 구현하기 위해 필수적인 중간 단계로, 사용자의 지휘 동작을 감지하여 연주의 박자(속도)를 제어하는 지휘 시뮬레이션 시스템을 제시한다. 실제의 지휘 동작을 분석하고, 동작의 변화를 인식하기 위하여 가속도 센서를 이용, 공간상에서 지휘봉의 움직임을 가속도 정보로 수집하여 이에 상응하는 박자의 제어를 구현한다. 사용자의 박자 명시에 따라 변화하는 상하 방향의 가속도를 센서를 통해 전압 신호로 입력 받고, DSP 의 A/D conversion 모듈에서 디지털 신호로 변환, 일정 수준 이상의 신호를 박자 정보로 직렬통신을 통해 컴퓨터에 전달한다. 컴퓨터에서는 Max/MSP를 이용하여 각 박자 사이의 시간 간격을 측정하고 상응하는 MIDI 음악을 재생하는 방식으로 시스템이 구현된다. 기존 연구에서 사용된 CCD 카메라에 의한 Motion Tracking 을 보완하여 동작의 크기에 따라 음량을 조절한다. 본 논문에서 제시되는 시스템은 지휘 동작에서 가장 특징적으로 나타나는 상하 방향의 급격한 가속도 변화를 직접 입력 받기 때문에 기존 시스템에 비해 지휘 동작의 인식 성공률을 높일 수 있으며, 화상 처리 및 계산에 의한 지연을 최소화할 수 있다. 또한, 장치의 규모를 소형화하여 보다 지휘봉의 형태에 가까운 인터페이스를 제공하며, 적합한 응용 콘텐츠를 접목할 경우 게임 컨트롤러로의 발전 가능성이 있다.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.1
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• pp.57-65
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• 2017

This paper presented a method of designing low-power feedback active noise control filter optimized for headphones/earphones. Using constrained optimization, we obtained a high order FIR noise control filter to ensure reasonable noise attenuation performance at high sampling frequency environment. Then using infinite impulse response (IIR) approximation method called Balanced Model Truncation (BMT), we obtained a low order IIR noise control filter suitable for low-power digital signal processing system like headphones/earphones. For further performance improvement, we utilized frequency warping method so that we could obtain more accurately approximated IIR filter and we ensured system stability by reconstructing the low order IIR filter in form of cascaded second order IIR filters. ANC simulation with white noise and stability test verified that the proposed algorithm had superior attenuation performance and better robustness compared to the conventional algorithm.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.5
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• pp.548-555
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• 2001

In this paper, we proposed a HVS(human visual system) model-based digital image watermarking which is not only invariant to rotation and translation but also more robust to lossy compression, cropping, and scaling as compared to the conventional method. Fourier transform and log-polar mapping is used to make the proposed algorithm invariant to rotation and translation, and in addition, watermark energy is embedded maximally based on spatial frequency sensitivity of HVS without the deterioration of the invisibility. As a result, the robustness of watermarking is improved both in general image processing operations such as cropping, low pass filtering, and lossy compression and in geometrical transforms such as rotation, translation, and scaling. And, by disjoint embedding of the watermark and the template without intersection, the deterioration of invisibility and robustness is prevented. Experimental results show that proposed watermarking is about 30~75 [%] more robust af compared to the conventional methods.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.5
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• pp.558-565
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• 2013

In this paper, modeling and simulation for performance analysis of high resolution SAR system has been carried out in the time, frequency and numeric domain using ADS Ptolemy simulation tool of Agilent corporation. SAR system consists of antenna, controller and transceiver. Error parameters affecting SAR system performances have been defined, modeled and simulated such as phase noise of frequency synthesizer, amplitude and phase characteristic of TWTA, sampling frequency of waveform generator and I/Q imbalance. Finally, the development requirements of SAR system based on the impulse response function have been derived.

• Journal of Practical Engineering Education
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• v.11 no.2
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• pp.167-174
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• 2019

In the case of Java programming education for non-major undergraduates, there are no examples of applying the physical computing education method. The advantage of physical computing education is that you can directly check the SW processing output result according to the input value of digital and analog sensor, so that you can quickly correct programming errors and improve learner's learning interest and satisfaction. In this paper, we use the microbits to combine physical computing education with basic Java programming education. In addition, according to the computational thinking process, we proposed an educational method for creating Java programs using microbits. Through block programming to control the microbits, we designed an algorithm and applied a training method to convert it into a Java program. In addition, the results of students' evaluations were analyzed in the course applying the education method, and the effectiveness of the education method using the microbit was analyzed.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.1-13
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• 1999

As the complexity of DSP (Digital Signal Processing) applications increases, the need for new architectures supporting efficient high-level language compilers also grows. By combining several DSP processor specific features, such as single cycle MAC (Multiply-and-ACcumulate), direct memory access, automatic address generation, and hardware looping, with a RISC core having many general purpose registers and orthogonal instructions, a high-performance and compiler-friendly RISC-based DSP processors can be designed. In this study, we develop a code-converter that can exploit these DSP architectural features by post-processing compiler-generated assembly code, and evaluate the performance effects of each feature using seven DSP-kernel benchmarks and a QCELP vocoder program. Finally, we also compare the performances with several existing DSP processors, such as TMS320C3x, TMS320C54x, and TMS320C5x.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.11
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• pp.35-42
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• 2004

A CMOS folding ADC with transistor differential pair folding circuit for low power consumption and high speed operation is presented in this paper. This paper explains the theory of transistor differential pair folding technique and many advantages compared with conventional folding and interpolation circuits. A ADC based on transistor differential pair folding circuit uses 16 fine comparators and 32 interpolation resistors. So it is possible to achieve low power consumption, high speed operation and small chip size. Design technology is based on fully standard 0.25${\mu}{\textrm}{m}$ double poly 2 metal n-well CMOS process. A power consumption is 45mW at 2.5V applied voltage and 250MHz sampling frequency. The INL and DNL are within $\pm$0.15LSB and $\pm$0.15LSB respectively. The SNDR is approximately 50dB at 10MHz input frequency.