• Title/Summary/Keyword: 도로 범프

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Development of Warpage Simulation Method according to Thermal Stress based on Equivalent Anisotropic Viscoelastic Model (등가 이방성 점탄성 모델 기반 열 응력에 따른 휨 해석 기법 개발)

  • Kim, Heon-Su;Kim, Hak-Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.29 no.3
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    • pp.43-48
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    • 2022
  • In this study, simulation method was developed to improve the accuracy of the warpage simulation based on the equivalent anisotropic viscoelastic model. First, a package with copper traces and bumps was modeled to implement anisotropic viscoelastic behavior. Then, equivalent anisotropic viscoelastic properties and thermal expansion coefficient for the bump region were derived through the representative volume element model. A thermal cycle of 0 to 125 degrees was applied to the package based on the derived mechanical properties, and the warpage according to the thermal cycle was simulated. To verify the simulation results, the actual package was manufactured, and the warpage with respect to the thermal cycle was measured through shadow moiré interferometer. As a result, by applying the equivalent anisotropic viscoelastic model, it was possible to calculate the warpage of the package within 5 ㎛ error and predict the shape of the warpage.

Reliability Studies on Cu/SnAg Double-Bump Flip Chip Assemblies for Fine Pitch Applications (미세피치용 Cu/SnAg 더블 범프 플립칩 어셈블리의 신뢰성에 관한 연구)

  • Son, Ho-Young;Kim, Il-Ho;Lee, Soon-Bok;Jung, Gi-Jo;Park, Byung-Jin;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.37-45
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    • 2008
  • In this study, reliabilities of Cu (60 um)/SnAg (20 um) double-bump flip chip assemblies were investigated for the flip chip interconnections on organic substrates with 100 um pitch. After multiple reflows at $250^{\circ}C\;and\;280^{\circ}C$, bump contact resistances were almost same regardless of number of reflows and reflow temperature. In the high temperature storage test, there was no bump contact resistance change at $125^{\circ}C$ up to 2000 hours. However, bump contact resistances slightly increased at $150^{\circ}C$ due to Kirkendall voids formation. In the electromigration test, Cu/SnAg double-bump flip chip assemblies showed no electromigration until about 600 hours due to reduced local current density. Finally, in the thermal cycling test, thermal cycling failure mainly occurred at Si chip/Cu column interface which was found out the highest stress concentration site in the finite element analysis. As a result, Al pad was displaced out under thermal cycling. This failure mode was caused by normal compressive strain acting Cu column bumps along perpendicular direction of a Si chip.

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High Speep/High-Precision Chip Joining Using Self-Assembly Technology for Three-Dimensional Integrated Circuits (삼차원적층형 집적회로 구현을 위한 자기조직화정합기술을 이용한 고속.고정밀 접합기술)

  • Lee, Kang-Wook
    • Journal of Welding and Joining
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    • v.29 no.3
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    • pp.19-26
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    • 2011
  • 본 논문에서는 액체의 표면장력을 이용하여 복수의 KGD 들을 웨이퍼 상태에서 일괄접합함으로써, 높은 수율의 삼차원적층칩을 빠른 생산성으로 제작할 수 있는, 고속 고정밀 접합기술인 자기조직화정합 (Selfassembly) 기술에 대해 소개를 하였다. 본 연구실에서 개발한 self-assembly 기술을 적용하여 5mm 각(角) 크기의 칩 500개를 1초 이내에 평균 $0.5{\mu}m$ 정도의 높은 정밀도로 8인치 웨이퍼상에 일괄접합시키는데 성공하였다. Self-assembly 기술에 의한 삼차원 칩 적층방식은, 기존의 pick-and-place 적층방식에서 높은 정밀도의 접합특성을 확보하는데 필요한 공정시간을 혁신적으로 단축하는 것이 가능하고, 웨이퍼 레벨에서 복수의 KGD 들을 일괄접합하는 것이 가능하므로, 향후 TSV 기술의 양산화를 실현하는데 적합한 고속 고정밀 접합 기술로서 기대가 크다. 현재 본 연구실에서는 두께가 $50{\mu}m$ 이하의 얇은 LSI 칩 및 메탈범프가 형성된 LSI 칩 등을 이용하여, self-assembly 기술에 의한 삼차원 적층형 집적회로 구현을 위한 접합기술을 개발 중에 있다.

A Study on the Dynamic Response of Highway Bridges by 4-Axles Single Truck (4축 단일차량에 의한 도로교의 동적응답에 관한 연구)

  • Chung, Tae-Ju
    • Journal of Korean Society of Steel Construction
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    • v.23 no.3
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    • pp.397-404
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    • 2011
  • In this paper, a research for the dynamic wheel loads of a 3D vehicle model, which relates to a tire-enveloping model, is carried out. A single truck with four axles is modeled as a 10-D.O.F. vehicle by modeling both contact length of tires and pitching of tandem spring axles. The dynamic equations of the vehicle are obtained using the Lagrange's equation, the solution of the equations is calculated by Newmark-${\beta}$ method. The validity of the developed 3D vehicle model is demonstrated by comparing results obtained from the proposed method with those from experimental data. The maximum impact factors of tire force are evaluated according to the various step bumps on which a 24-ton dump truck is running.

A Study on the Dynamic Wheel Loads of 3-D Vehicle Model Considering Tire Enveloping (타이어 접지폭을 고려한 3차원 차량모델에 의한 동적 차륜하중에 관한 연구)

  • Chung, Tae Ju
    • Journal of Korean Society of Steel Construction
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    • v.14 no.1
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    • pp.95-104
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    • 2002
  • In this paper, research for dynamic wheel loads of 3-D vehicle model considering tire enveloping model is carried out. Heavy trucks with 2-axles and 3-axles are modeled by 7-d.o.f. and 8-d.o.f., in which contact length of tire and pitching of tandem spring axles is considered. Dynamic equations of vehicle are derived by using the Lagrange's equation and solution of the equation is calculated by 5th Runge-Kutter method. The validity of the developed 3-D vehicle model is demonstrated by comparing the results obtained by the present method and experimental data by Whittemore. The maximum impact factors of tire force are calculated when vehicle models of 8ton and 15ton dump truck are running on the different class roads with 1.0km and on the various step bump.

A Study on Vibration Control Performance of Macpherson Type Semi-Active Suspension System (맥퍼슨 타입 반 능동 현가장치의 진동제어 성능 고찰)

  • Dutta, Saikat;Han, Chulhee;Lee, TaeHoon;Choi, Seung-Bok
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.26 no.2
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    • pp.157-164
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    • 2016
  • The paper studies a comparison analysis of semi-active control strategies for a Macpherson strut type suspension system consisting of MR(magneto-rheological) damper. As a first step, in order to formulate governing, a dynamic full model of a Macpherson strut is developed considering the kinematics. The nonlinear equation of motion of the strut is then linearized around the equilibrium point. A new adaptive moving sliding model controller is developed for fast response of the system. A newly proposed adaptive moving sliding mode control strategy is then compared with conventional sliding mode controller and skyhook controller. The comparison is made for two different types of road inputs; bump and random road profiles showing superior vibration control performance in time and frequency domains.

A Study on Ni Electroless Plating Process for Solder Bump COG Technology (COG용 Solder Bump 제작을 위한 Ni 무전해 도금 공정에 관한 연구)

  • Han, Jeong-In
    • Korean Journal of Materials Research
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    • v.5 no.7
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    • pp.794-801
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    • 1995
  • To connect the driver IC and Al coated glass, a method has been developed to plate electrolessly Ni on Al/PR system. It Is necessary to pretreat Al to remove oxide film before plating. In order to find pretreatment process which does not damage photoresist or glass, alkaline and fluoride zincate process have been investigated. Because photoresist and aluminum thin film can easily dissolve in alkaline solution, it is considered that the fluoride zincate process was a suitable one. After immersion in the zincate solution containing 1.5 g/$\ell$ ammonium bifluoride and 100 g/$\ell$ zinc sulfate, electroless nickel plating could be performed. The additive in the zincate solution and thiourea in the plating solution increased smoothness of the plated surface. Acld dip could improve the uniformit of the surface.

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Stretchable Deformation-Resistance Characteristics of the Stiffness-Gradient Stretchable Electronic Packages Based on PDMS (PDMS 기반 강성도 경사형 신축 전자패키지의 신축변형-저항 특성)

  • Park, Dae Ung;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.26 no.4
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    • pp.47-53
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    • 2019
  • Stiffness-gradient stretchable electronic packages of the soft PDMS/hard PDMS/PTFE structure were processed using the polydimethylsiloxane (PDMS) as the base substrate and the more stiff polytetrafluoroethylene (PTFE) as the island substrate, and their stretchable deformation-resistance characteristics were characterized. The flip-chip joints, formed by bonding the chip bumps of 50 ㎛-diameter onto the PDMS/PTFE substrate pads, exhibited an average contact resistance of 96 mΩ. When the stretchable package of the soft PDMS/hard PDMS/PTFE structure was deformed to 30% elongation, the strain on the PTFE was restrained to 1%, resulting in a negligible resistance increase of 1% in the daisy-chain circuit formed on the PTFE island substrate. The circuit resistance increased for 1.7% after 2,500 cycles of 0~30% stretchable deformation.

Flip Chip Process on the Local Stiffness-variant Stretchable Substrate for Stretchable Electronic Packages (신축성 전자패키지용 강성도 국부변환 신축기판에서의 플립칩 공정)

  • Park, Donghyeun;Oh, Tae Sung
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.4
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    • pp.155-161
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    • 2018
  • A Si chip with the Cu/Au bumps of $100-{\mu}m$ diameter was flip-chip bonded using different anisotropic conductive adhesives (ACAs) onto the local stiffness-variant stretchable substrate consisting of polydimethylsiloxane (PDMS) and flexible printed circuit board (FPCB). The average contact resistances of the flip-chip joints processed with ACAs containing different conductive particles were evaluated and compared. The specimen, which was flip-chip bonded using the ACA with Au-coated polymer balls as conductive particles, exhibited a contact resistance of $43.2m{\Omega}$. The contact resistance of the Si chip, which was flip-chip processed with the ACA containing SnBi solder particles, was measured as $36.2m{\Omega}$, On the contrary, an electric open occurred for the sample bonded using the ACA with Ni particles, which was attributed to the formation of flip-chip joints without any entrapped Ni particles because of the least amount of Ni particles in the ACA.

Reliability Improvement of Cu/Low K Flip-chip Packaging Using Underfill Materials (언더필 재료를 사용하는 Cu/Low-K 플립 칩 패키지 공정에서 신뢰성 향상 연구)

  • Hong, Seok-Yoon;Jin, Se-Min;Yi, Jae-Won;Cho, Seong-Hwan;Doh, Jae-Cheon;Lee, Hai-Young
    • Journal of the Microelectronics and Packaging Society
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    • v.18 no.4
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    • pp.19-25
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    • 2011
  • The size reduction of the semiconductor chip and the improvement of the electrical performance have been enabled through the introduction of the Cu/Low-K process in modern electronic industries. However, Cu/Low-K has a disadvantage of the physical properties that is weaker than materials used for existing semiconductor manufacture process. It causes many problems in chip manufacturing and package processes. Especially, the delamination between the Cu layer and the low-K dielectric layer is a main defect after the temperature cycles. Since the Cu/Low-K layer is located on the top of the pad of the flip chip, the stress on the flip chip affects the Cu/Low-K layer directly. Therefore, it is needed to improve the underfill process or materials. Especially, it becomes very important to select the underfill to decrease the stress at the flip-chip and to protect the solder bump. We have solved the delamination problem in a 90 nm Cu/Low-K flip-chip package after the temperature cycle by selecting an appropriate underfill.