• The Korean Journal of Applied Statistics
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• v.17 no.2
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• pp.311-326
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• 2004

We propose a Markov model of two bottleneck ECN/RED gateways experiencing a large number of TCP users. We show that, as the number of users becomes large, the queue sizes per user of the both gateways converge at steady-state to individual fixed points. Also, we derive a computational algorithm to exactly obtain the fixed points and present simulation example showing the limiting behavior of the gateway traffic.

• The Journal of the Korea Contents Association
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• v.4 no.4
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• pp.189-196
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• 2004

Most of the recent researches for ATM switches have been based on multistage interconnection network known as regularity and self-routing property. These networks can switch packets simultaneously and in parallel. However, they are blocking networks in the sense that packet is capable of collision with each other Mainly Banyan network have been used for structure. There are several ways to reduce the blocking or to increase the throughput of banyan-type switches: increasing the internal link speeds, placing buffers in each switching node, using multiple path, distributing the load evenly in front of the banyan network and so on. Therefore, this paper proposes the use of recirculating shuffle-exchange network to reduce the blocking and to improve hardware complexity. This structures are recirculating shuffle-exchange network as simplified in hardware complexity and Rank network with tree structure which send only a packet with highest priority to the next network, and recirculate the others to the previous network. after it decides priority number on the Packets transferred to the same destination, The transferred Packets into banyan network use the function of self routing through decomposition and composition algorithm and all they arrive at final destinations. To analyze throughput, waiting time and packet loss ratio according to the size of buffer, the probabilities are modeled by a binomial distribution of packet arrival. If it is 50 percentage of load, the size of buffer is more than 15. It means the acceptable packet loss ratio. Therefore, this paper simplify the hardware complexity as use of recirculating shuffle-exchange network instead of bitonic sorter.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.9
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• pp.2027-2034
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• 1997

Frame relay is a fast packet switching technology that performs relaying and multiplexing frames with variable lengths over a wide area link at the T1 or E1 speed, by elminating error and flow control in the network. In frame relay networks, congestion control is typically performed through the rate enforcement with a discard eligibility (DE) bit, and the explicit negative feedback meachanisms using explicit congetion notification bits. In this paper, we consider the congestiong control scheme using the rate enforcement mechanism with DE bit for frame relay network. Assuming that each frame with exponentially distributed length arrives according to the Poission fashion, we can treat the frame relay switch as an M/M/1/K priority queueing system with pushout basis. We analyze and present the blocking probabilities and waiting time distributions of frames.

• Journal of Korea Multimedia Society
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• v.12 no.1
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• pp.41-49
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• 2009

Smart Card is currently more popular in mobile communication, and smart card with java card platform becomes a standard choice. Java card has a problem that it gets lost working data when power is off. Transaction is the idea to solve a problem of data loss, but it accepts only one transaction process, and other transaction process need to hold until the current working transaction is finished. This might be a factor to drop the Java card's performance. In this paper, we define a rule of dual-lock which can run transaction at multiple transaction buffer as a method for a better java card performance, and we suggest this rule to improve a capability of transaction process. From this research, we are able to improve the data stability, reduce the java card transaction delay time, and get a higher processing speed of java card.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.4A
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• pp.259-270
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• 2005

This paper proposes a mathematical model to analyze call-and packet-level performance of the TD-CDMA/TDD system which could serve a flexible radio resource management against multi-type heterogeneous and asymmetrical traffic conditions. On call-level analysis, the mathematical model based on queueing theory performs multi-dimensional operations using random vectors or matrices to consider multiple types of traffic and also deal with asymmetrical up- and down-direction transmissions separately. Employing the mathematical model, we obtain rail blocking probability for each type of traffic and also the optimum switching-point with the smallest call flocking probability. And on packet-level analysis, employing a non-prioritized queueing scheme between circuit and packet calls, we solve 2-dimensional random vector problem composed of the queue length for packets and the number of circuit calls being served. Finally, packet-level performance is analyzed in terms of the packet loss probability and the buffer size required under mixed-traffic conditions of multiple types of circuit and packet calls.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.786-792
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• 2016

Camellia was jointly developed by Nippon Telegraph and Telephone Corporation and Mitsubishi Electric Corporation in 2000. Camellia specifies the 128-bit message block size and 128-, 192-, and 256-bit key sizes. In this paper, a modified round operation block which unifies a register setting for key schedule and a conventional round operation block is proposed. 16 ROMs needed for key generation and round operation are implemented using only 4 dual-port ROMs. Due to the use of a message buffer, encryption/decryption can be executed without a waiting time immediately after KA and KB are calculated. The suggested block cipher Camellia algorithm is designed using Verilog-HDL, implemented on Virtex4 device and operates at 184.898MHz. The designed cryptographic core has a maximum throughput of 1.183Gbps in 128-bit key mode and that of 876.5Mbps in 192 and 256-bit key modes. The cryptographic core of this paper is applicable to security module of the areas such as smart card, internet banking, e-commerce and satellite broadcasting.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.75-84
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• 2004

In this paper, we proposed an efficient hardware architecture of line-based lifting algorithm for Motion JPEG2000. We proposed a new architecture of a lifting-based filtering cell which has an optimized and simplified structure. It was implemented in a hardware accommodating both (9,7) and (5,4) filter. Since the output rate is linearly proportional to the input rate, one can obtain the high throughput through parallel operation simply by adding the hardware units. It was implemented into both of ASIC and FPGA The 0.35${\mu}{\textrm}{m}$ CMOS library from Samsung was used for ASIC and Altera was the target for FRGA. In ASIC, the proposed architecture used 41,592 gates for the lifting arithmetic and 128 Kbit memory. For FPGA it used 6,520 LEs(Logic Elements) and 128 ESBs(Embedded System Blocks). The implementations were stably operated in the clock frequency of 128MHz and 52MHz, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.428-428
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• 2016

Copper indium sulfide (selenide) (CuIn(S,Se)2,CISSe)는 1.0~1.5 eV의 Direct band gap과 105 cm-1이 넘는 큰 광 흡수 계수를 가지고 있어 박막 태양전지의 흡수층으로써 연구되어 왔다. 최근 대량생산 및 저가 공정에 용이하다는 측면에서 용액 공정 기반 CISSe 태양전지 연구가 크게 주목 받고 있다. 용액공정 기반 중 하이드라진을 사용 한 경우 매우 높은 효율을 기록하였으나, 하이드라진 자체의 유독성과 폭발성 때문에 분위기 제어가 필요하고 여전히 저가화 및 대면적 제작에 한계가 있다. 따라서 알코올 솔젤 기반 CISSe 태양전지 제작 연구가 많이 진행되었으나, 결정립 성장 및 칼코겐 원자를 공급하기 위해 불가피하게 황화/셀렌화 후속 열처리 공정을 요구한다. 후속 열처리 공정은 폭발성의 황화수소/황화셀레늄 기체 분위기 제어와 고가의 장비를 필요로 한다. 본 연구에서는 매우 안정적이며 저가 용매인 물과 아민계 첨가제를 이용하여 Cu, In 전구체와 S, Se 이 포함된 Cu-In-S 잉크와 Se잉크를 제작하였다. 잉크 내에 S, Se을 첨가 함으로써 추가적인 후속공정 없이 비활성 가스 분위기에서 고품질의 CISSe 박막 제작을 가능케 하였다. 또한 Se 잉크 증착 횟수에 따른 결정 구조, 광학적 성질의 차이에 주목하였다. 따라서 수계 잉크를 대기 중에서 스핀코팅으로 박막을 제작한 후, Hot plate에서 건조하여 균일한 박막을 제조하고, 제작된 박막을 tube furnace에서 환원 분위기 및 비활성 가스 분위기에서 열처리 진행하여 $1.3{\mu}m$ 두께의 고품질의 CISSe 흡수층을 제작하였다. 이러한 흡수층에 대해 XRD, SEM, EDS 분석을 진행하여, 결정성, 미세구조, 및 조성을 확인하였으며, 제작된 흡수층 위에 버퍼층/투명전극층을 차례로 증착하여 CISSe 태양전지를 제작하여 셀 성능 및 양자 효율 특성을 파악하였다. 또한 액상 Raman 분석을 통해 결정립 성장 과정 메커니즘을 제시하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.19 no.4
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• pp.750-760
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• 1994

In this paper we proposed a multiplexing scheme of real time and non-real traffics in which a congestion control is embedded. Real time traffics are assumed to be nonqueuable and have preemptive priority over non-real time traffics in seizing the common output link, whereas the non-real time traffics wait in the common buffer if the output link is not available for transmission. Real time traffics are encoded according to the bandwidth reduction strategy, paticularly when congestion occurs among non-real time traffics. This scheme provides us an efficient way for utilizing the costly bandwidth resources, by accommodation as many real time traffics as possible with gauranteeing its mimimum bandwidth requirements, and also resloving the congestion encountered among non-real time traffics. We describe the system as a Markov queueing system, provide the analysis by exploiting the matrix geometric method, and present the performance for various performance measures of interest. Some numerical results are also provided.

• The KIPS Transactions:PartB
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• v.9B no.6
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• pp.835-844
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• 2002

The number of channels available to a video server is limited since the number of channels a video server can support is determined by its communication bandwidth. Several approaches such as batching, piggybacking and patching have been proposed to reduce I/O demand on the video server by sharing multicast data. Patching has been shown to be efficient in the matter of the cost for VOD systems. Unlike conventional multicast techniques, patching is a dynamic multicast scheme which enables a new request to join an ongoing multicast. In addition, true VOD can be achieved since a new request can be served immediately without having to wait for the next multicast. In this paper. we propose two types of channel reservation patching algorithm : a fixed channel reservation patching and a variable channel reservation patching. To immediately schedule the requests for popular videos, these algorithms reserve the channels of video server for the fixed number of popular videos or for the variable number of popular videos which is determined dynamically according to the load of video server. The performance of the proposed algorithms is evaluated through simulations, and compared with that of simple patching. Our performance measures are average defection rate, average latency, service fairness and the amount of buffered data according to video server loads. Simulation results show that the proposed channel reservation patching algorithms provide better performance compared to simple patching algorithm.