• Title/Summary/Keyword: 다중프로세서 시스템

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Task Duplication Based Clustering and Scheduling on Symmetric Multiprocessor Systems (대칭형 다중프로세서 시스템에서 태스크 중복기반의 클러스터링과 스케줄링)

  • 강오한;조경미;김기남;김시관
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.04a
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    • pp.97-99
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    • 2003
  • 대칭형 다중프로세서 (SMP: Symmetric Multiprocessors) 시스템은 고성능의 병렬 연산을 위한 중요하고 효과적인 기반환경을 제공하고 있다. SMP에서 태스크 클러스터링과 스케줄링 기법은 시스템의 성능에 큰 영향을 미친다. 본 논문에서는 버스 기반의 SMP에서 사용할 수 있는 태스크 중복 기반의 클러스터링과 스케줄링 기법을 소개한다. 본 논문에서 제안한 클러스터링 기법에서는 휴리스틱을 사용하여 중복할 태스크를 선택한 후 프로세서에 할당하고, 스케줄링 기법에서는 잠재하는 통신 충돌을 방지하기 위하여 네트워크 통신 자원을 사전에 할당한다. 새로운 클러스터링과 스케줄링 기법의 성능을 확인하기 위하여 시뮬레이션에서는 통신비용의 변화에 대한 병렬연산시간을 비교하였다.

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Fuzzy-based Processor Allocation Strategy for Multiprogrammed Shared-Memory Multiprocessors (다중프로그래밍 공유메모리 다중프로세서 시스템을 위한 퍼지 기반 프로세서 할당 기법)

  • 김진일;이상구
    • Journal of the Korean Institute of Intelligent Systems
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    • v.10 no.5
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    • pp.409-416
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    • 2000
  • In the shared-memory mutiprocessor systems, shared processing techniques such as time-sharing, space¬sharing, and gang-scheduling are used to improve the overall system utilization for the parallel operations. Recently, LLPC(Loop-Level Process Control) allocation technique was proposed. It dynamically adjusts the needed number of processors for the execution of the parallel code portions based on the current system load in the given job. This method allocates as many available processors as possible, and does not save any processors for the parallel sections of other later-arriving applications. To solve this problem, in this paper, we propose a new processor allocation technique called FPA(Fuzzy Processor Allocation) that dynamically adjusts the number of processors by fuzzifYing the amounts ofueeded number of processors, loads, and estimated execution times of job. The proposed method provides the maximum possibility of the parallism of each job without system overload. We compare the performances of our approaches with the conventional results. The experiments show that the proposed method provides a better performance.

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An Implementation of a Mode Changeable Real-Time Scheduler for RTLinux SMP (RTLinux SMP를 위한 Mode Change 가능한 실시간 스케즐러의 구현)

  • 차성덕;김인국
    • Proceedings of the Korean Information Science Society Conference
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    • 2001.04a
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    • pp.79-81
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    • 2001
  • 논리적 정확성과 시간적 제약의 만족을 중요시하는 실시간 시스템은 시간이 경과함에 따라 그 기능이 다른 것들로 변화되는 mode change를 요구할 수도 있으며, 그 시간적 제약의 엄격함에 따라 경성 실시간 시스템과 연성 실시간 시스템으로 나눌 수 있다. 유닉스 계열의 운영체제를 확장한 운영체제인 Linux는 연성 실시간을 지원하도록 개발되었으며 이 Linux에 최소의 변경을 가해 경성 실시간을 지원하기 위한 RTLinux가 개발되었다. RTLinux 버전 2.0은 다중 프로세서 시스템을 지원할 수 있도록 재 설계되었지만, 다중 프로세서 환경에서 주어진 태스크들을 각 프로세서에서 정확하고 효율적으로 실행시키기 위한 구체적인 프로세서할당 및 스케줄링 기능은 제공되지 않고 있다. 이러한 사항들을 만족시키기 위해 본 논문에서는 다중 프로세서 환경에서 mode change되는 태스크들이 각각의 mode 범위 내에서 정확하고 효율적으로 실행될 수 있도록 프로세서를 할당하고 스케줄링하는 RTLinux스케줄러를 제시하고 구현하였다.

Implementation and Translation of Major OpenMP Directives for Chip Multiprocessor without using OS (단일 칩 다중 프로세서상에서 운영체제를 사용하지 않은 OpenMP 구현 및 주요 디렉티브 변환)

  • Jeun, Woo-Chul;Ha, Soon-Hoi
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.4
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    • pp.145-157
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    • 2007
  • OpenMP is an attractive parallel programming model for a chip multiprocessor because there is no standard parallel programming method for a chip multiprocessor and it is easy to write a parallel program in OpenMP. Then, chip multiprocessor systems can have various architectures according to target application programs. So, we need to implement OpenMP in different way for each system. In this paper, we propose the implementation and the effective translation of major OpenMP directives for a chip multiprocessor without using OS to improve the performance without using special hardware and without extending the OpenMP directives. We present the experimental results on our target platform CT3400.

A Multiprocessor Scheduling Methodology for DSP Applications.

  • Hong, Chun-Pyo;Yang, Jin-Mo
    • Journal of Korea Society of Industrial Information Systems
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    • v.6 no.2
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    • pp.38-46
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    • 2001
  • This paper presents a new multiprocessor system and corresponding scheduling algorithm that can be applied for implementation of fine grain DSP algorithms such as digital filters. The newly proposed system uses one or more shared buses as the basic interconnection network between processors, and fixed amount of clock-skew is maintained between instruction execution of processors. This system not only can handle the interprocessor communications very efficiently but also can explicitly incorporate the interprocessor communication delay time into the multiprocessor scheduling model. This paper also presents a new scheduling strategy for implementing digital filters expressed in fully-specified flow graphs on the proposed system. The simulation result shows that well-known digital filters can be implemented on proposed multiprocessor in which the implementation satisfies the iteration period bound.

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Multi-Programmed Simulation of a Shared Memory Multiprocessor System (공유메모리 다중프로세서 시스템의 다중 프로그래밍 모의실험 기법)

  • 최효진;전주식
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.3_4
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    • pp.194-204
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    • 2003
  • The performance of a shared memory multiprocessor system is dependent on the system software such as scheduling policy as well as hardware system. Most of existing simulators, however, do not support simulation for multi-programmed environment because they can execute only a single benchmark application at a time. We propose a multi-programmed simulation method on a program-driven simulator, which enables the concurrent executions of multiple parallel workloads contending for limited system resources. Using the proposed method, system developers can measure and analyze detailed effects of resource conflicts among the concurrent applications as well as the effects of scheduling policies on a program-driven simulator. As a result, the proposed multi-programmed simulation provides more accurate and realistic performance projection to design a multiprocessor system.

Design of Pipeline Bus and the Performance Evaluation in Multiprocessor System (다중프로세서 시스템에서 파이프라인 전송 버스의 설계 및 성능 평가)

  • 윤용호;임인칠
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.2
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    • pp.288-299
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    • 1993
  • This paper proposes the new bus protocol in the tightly coupled multiprocessor system. The bus protocol uses the pipelined data transfer and block transfer scheme to increase the bus bandwidth, The bus also has the independent transfer lines for the address and data respectively, and it can transfer the data up to maximum 264 Mbytes /sec. This paper also models the multiprocessor system where each processor boards have the private cache. Simulation evaluates the bus and system performance according to hit ratio of the reference data in cache memory, In the case of using this bus, the bus is evaluated not to be saturated when up to 10 processor boards are connected to the bus. As for up to 4 memory interleavng, the performance increases linearly.

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Performance Analysis of A Distributed Shared Memory System Including Minor Performance Factors (군소 성능요인을 고려한 분산공유메모리 시스템 성능의 정밀분석)

  • 박준석;전창호
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.10c
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    • pp.671-673
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    • 2000
  • 본 논문에서는 분산공유메모리 다중프로세서 시스템에서 하드웨어 구성요소와 실행환경이 시스템의 전체 성능에 미치는 영향을 시뮬레이션을 통하여 분석한다. PARSEC[1,2]을 이용하여 분산공유메모리 다중프로세서 시스템을 실제 실행환경에 근접하게 모델링하고 그 모델링된 시스템상에 2D FFT를 가상 실행하는 방식의 시뮬레이션 결과, 일반적으로 성능분석을 할 때 성능요소로 고려하지 않는 군소 하드웨어 요소들이 시스템 구성에 따라 시스템의 전체 성능에 상당한 영향을 미침을 밝힌다. 또한 반복순환 구문의 오버헤드, 코드최적화 등 실행조건에 따른 성능의 변화도 정량적으로 분석한다.

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Mixed Tasks Scheduling Using Improved Synthetic Utilization on Multiprocessor Systems (다중프로세서 시스템에서 개선된 합성 이용율을 이용한 혼합 태스크 스케줄링)

  • Moon, Seok-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.2
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    • pp.351-356
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    • 2015
  • Synthetic utilization on multiprocessor system is not considered periodic tasks, except scheduling methods for aperiodic tasks where one of the real-time aperiodic tasks is a scheduling method. But really aperiodic tasks scheduling method is composed of mixed task types. Aperiodic task scheduling method guarantee an analysis of the schedualibility of aperiodic task. The set of mixed tasks periodic and aperiodic tasks scheduling method uses improved synthetic utilization that is presented in this paper. The new method shows that schedulability increases aperiodic server method.

A Remote Cache Coherence Protocol for Single Shared Memory in Multiprocessor System (단일 공유 메모리를 가지는 다중 프로세서 시스템의 원격 캐시 일관성 유지 프로토콜)

  • Kim, Seong-Woon;Kim, Bo-Gwan
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.6
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    • pp.19-28
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    • 2005
  • The multiprocessor architecture is a good method to improve the computer system performance. The CC-NUMA provides a single shared space with the physically distributed memories is used widely in the multiprocessor computer system. A CC-NUMA has the full-mapped directory for the shared memory md uses a remote cache memory for tile fast memory access. In this paper, we propose a processing node architecture for a CC-NUMA system and a cache coherency protocol on the physically distributed but logically shared system. We show an implementation result of the system which is adopted the cache coherency protocol.