• Journal of the Korean Vacuum Society
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• v.21 no.5
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• pp.279-285
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• 2012

We report on the measurements of electronic transport properties of CVD graphene placed on a pre-patterned substrate with periodic nano trenches. A strong anisotropy has been observed between the transport parallel and perpendicular to the trenches. Characteristically different weak localization corrections have been also observed when the transport was perpendicular to the trench, which is interpreted as due to a density inhomogeneity generated by the potential modulations.

• Journal of IKEEE
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• v.19 no.1
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• pp.41-44
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• 2015

Silicon trench process for bulk fin field effect transistor (finFET) is suggested without using chemical mechanical polishing (CMP) that cause contamination problems with chemical stuff. This process uses thickness difference of photo resistor spin coating and silicon nitride sacrificial layer. Planarization of silicon oxide and silicon trench formation can be performed with etching processes. In this work 50 nm silicon trench is fabricated with AZ 1512 photo resistor and process results are introduced.