• Information and Communications Magazine
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• v.25 no.12
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• pp.26-32
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• 2008

본고에서는 SDR 시스템을 구성하는 핵심 부품의 하나인 기저대역 (Baseband) 프로세서의 구조에 대해서 논한다. 무선 통신 시스템의 물리계층 (Physical layer)에서 이루어지는 기저대역 신호처리는ASIC 형태로 구현되는 것이 보통이며 이는 처리량을 최대화하면서 적정한 수준의 전력 소모량을 유지하기 위한 것이다. 그렇지만, 소프트웨어의 변경만으로 여러 무선 통신 규격을 하드웨어 변경 없이 지원하려는 SDR (Software Defined Radio) 시스템에서는 지원해야 하는 통신규격의 수가 많기 때문에 프로그램 가능한 프로세서가 사용되어야 한다. 하지만, 현재까지 개발된 기저대역 프로세서들의 최대 데이터 처리량과소비전력은 상용제품으로는 부족한 것이 현실이다. 이와 같은 기대치와 실제 성능 사이의 격차를 줄이기 위해서 지금도 다양한 형태의 기저대역 프로세서들이 개발되고 있다. 본고에서는 현존하는 기저대역 프로세서들의 특성을 비교 분석한다.

• Journal of Satellite, Information and Communications
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• v.5 no.2
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• pp.97-103
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• 2010

In this paper, we present an efficient design scheme based on analysis of design requirements and considerations of baseband packet switch for S-band satellite/terrestrial hybrid multi-beam satellite communication systems. To establish design requirements and considerations, we analyze required functions of baseband packet switch, specifications of multi-beam satellite communications, communication services and performance requirements. And also we analyze and compare conventional layer-2 and layer-3 satellite baseband packet switching techniques, packet switching protocols and packet switch architectures, to apply from analyzed results. Finally, we propose a hardware design scheme of MPEG based layer-2 baseband packet switch using analyzed results.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.34-41
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• 2006

This paper presents a CMOS multi-mode baseband filter architecture to support PDC/GSM/EDGE/WCDMA and its new automatic tuning method. 5-th order Chebyshev low pass filter is designed for implementing the baseband channel-select filter. Capacitors and resistors were shared efficiently between modes to minimize the area. And, the new cut-off frequency tuning method is proposed to compensate the process variation. This method can reduce the area and the noise level due to MOS switches.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.7
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• pp.78-86
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• 2010

This paper discusses the programming model of SODA-II that is a baseband processor for software defined radio (SDR) systems. Signal processing On-Demand Architecture Ⅱ (SODA-II) is an on-chip multiprocessor architecture consisting of four processor cores and each core has both an wide SIMD datapath and a scalar datapath. This architecture is appropriate for baseband processing that is a mixture of vector computations and scalar computations. The programming model of the SODA-II is based on C library routines. Because the library routines hide the details of complex SIMD datapath control procedures, end users can easily program the SODA-II without deep understanding on its architecture. In this paper, we discuss the details of library routines and how these routines are exploited in the implementation of baseband signal processing algorithms. As application examples, we show the implementation result of W-CDMA multipath searcher and OFDM demodulator on the SODA-II.

• Proceedings of the Korea Information Processing Society Conference
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• 2015.10a
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• pp.396-397
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• 2015

본 논문에서는 이동 물체의 연속 위치 추적을 위한 무선 저전력 기저대역 모뎀을 설계 및 구현하였다. 설계된 모뎀은 단일 하드웨어로 16칩 및 32칩 대역확산을 통해 900MHz 대역 및 2.4GHz 대역을 동시에 지원하며, 250Kbps 이하 가변전송률 전송을 통해 다양한 통달거리 지원이 가능하다. FPGA 기반 구현 결과, 설계된 기저대역 모뎀은 8,010 Slice, 20,672 Slice LUT, 25,512 Flip Flop, 18Kb Block RAM으로 구성되었음을 확인하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.8B
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• pp.1012-1020
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• 2011

In this paper a design of $\pi$/4-DQPSK baseband receiver for the exchange of digital data and e-mail between shore and ship stations and/or among ship stations in the maritime mobile service VHF channels is described. Due to the permitted relatively big frequency instability of local oscillators at the transmitter and the receiver of maritime communication system, the designed baseband receiver should have the capabilities of correct estimation and compensation of the synchronization parameters, such as symbol timing and frequency offset, from the received signal which might include relatively big frequency error. Simulated BER results show that the designed baseband receiver works less than 0.5dB loss under AWGN channel when the normalized frequency offset of the received signal is more then 20%.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.5
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• pp.97-105
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• 2008

The micro capacitors are passive elements necessary to electronic circuits and wireless portable PAN(personal area network) and Mobile Communications device modules in the baseband circuits in combination with another passive and active devices. As capacitance is proportionally increased with dielectric constant and electrode areas, in addition, inversely decreased the thickness of the dielectric material, thus thin film capacitors are generally seen as a preferable means to achieve high performance and thin film capacitors are used in a variety of functional circuit devices. In this paper, propose dielectric material as AIN(Aluminium nitride) to make micro thin film capacitor, and this capacitor has the MIM(metal-insulator-metal) structure. AIN thin films are widespread applied because they had more excellent properties such as chemical stability, high thermal conductivity, electrical isolation and so on. In addition, AIN films show low frequency response for baseband signal ranges, I-V and C-V electrical characterization of a thin film micro capacitor. The above experimental test and estimated results demonstrate that the thin film capacitor has sufficient and efficient functional performance to be the baseband range frequency of general electronics circuit and passive device applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.3
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• pp.685-690
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• 2013

This paper has proposed a multi-channel and wide gain-range baseband circuit blocks for the IEEE 802.15.4g MR-OFDM SUN systems. The proposed baseband circuit blocks consist of two negative-feedback VGAs, an active-RC 5th-order chebyshev low-pass-filter, and a DC-offset cancellation circuit. The proposed baseband circuit blocks provide 1 dB cut-off frequencies of 100 kHz, 200 kHz, 400 kHz, and 600 kHz respectively, and achieve a wide gain-range of +7 dB~+84 dB with 1 dB step. In addition, a DC-offset cancellation circuit has been adopted to mitigate DC-offset problems in direct-conversion receiver. Simulation results show a maximum input differential voltage of $1.5V_{pp}$ and noise figure of 42 dB and 37.6 dB at 5 kHz and 500 kHz, respectively. The proposed I-and Q-path baseband circuits have been implemented in $0.18-{\mu}m$ CMOS technology and consume 17 mW from a 1.8 V supply voltage.

• The Magazine of the IEIE
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• v.22 no.9
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• pp.92-103
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• 1995

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.124-131
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• 2014

This paper describes a design of an adaptive baseband modem based on TDMA(time division multiple access) with a relay protocol function for wireless personal area networks. The designed baseband modem is controlled by a master synchronization signal and can be configured a relay network up to 14 hops. For efficient data relay communications, the internal buffer design is optimized by implementing a priority memory bus controller to a single port memory. And the priority memory bus controller is also designed to minimize the number of synthesized logic gates. To implement the synchronization function of the narrowband TDMA relay communication, the number of gates has been reduced by dividing the frame synchronization circuits and the network slot synchronization circuits. By using these methods, the number of gates are used about 37%(34,000 gates) on Xilinx FPGA XC6SLX9 which has 90,000 gates. For the 1024-bit frame size with a 32-bit synchronization word, the communication reception rate is 96.4%. The measured maximum transmission delay of the designed baseband modem is 230.4 msec for the 14-hop relay communication.