• Title/Summary/Keyword: 기생소자

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A study on Parasitic Impedance of Power Semiconductor Modules for EV (차량용 전력반도체 모듈의 기생 임피던스에 관한 고찰)

  • Jang, Tae Eun;Kim, Tae Wan;Jang, Dong Keun;Kim, Jun Sik;Park, Sihong
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.156-157
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    • 2012
  • 최근 국내에서도 다양한 형태의 전력반도체 모듈이 개발되고 있으며 대용량화에 따라 전력반도체 패키지 내부에 소자의 병렬연결이 흔히 사용되고 있다. 이에 따라 회로의 구조에 따른 기생 임피던스, 즉, 인덕턴스와 저항 성분은 개별 소자의 안전영역(SOA)을 넘는 스트레스를 발생시키고 고장을 일으킬 수 있다. 이러한 기생 임피던스를 모듈 설계 단계에서 시뮬레이션을 통해 분석하여 이에 의한 영향을 예측하고 설계에 반영하여 고 신뢰성 차량용 전력반도체 모듈을 개발하고자 한다.

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Sub-90nm 급 Logic 소자에 대한 기생 저항 성분 추출의 연구

  • 이준하;이흥주;이주율
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • 2003.05a
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    • pp.112-115
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    • 2003
  • Sub-90nm급 high speed 소자를 위해서는 extension영역의 shallow junction과 sheet 저항의 감소가 필수적이다. 일반적으로 기생저항은 channel저항의 약 10-20%정도를 차지하도록 제작되므로, 이를 최소화하여 optimize하기 위해서는 기생저항에 대한 성분 분리와 이들이 가지는 저항값에 대한 정량적 계산이 이루어져야 한다. 이에 본 논문은 calibration된 TCAD simulation을 통해 90nm급 Tr. 에서 각 영역의 저항성분을 계산, 평가하는 방법을 제시한다. 이 결과, 특히, extension영역의 표면-accumulation부분이 가장 개선이 있어야 할 부분으로 분석되었으며, 이 저항은 gate하부에 존재하는 extension으로부터 발if되는 측면 doping의 tail영역으로 인해 형성되는 것으로,doping의 abruptness가 가장 중요한 factor인 것으로 판단된다.

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A study on the design of thyristor-type ESD protection devices for RF IC's (RF IC용 싸이리스터형 정전기 보호소자 설계에 관한 연구)

  • Choi, Jin-Young;Cho, Kyu-Sang
    • Journal of IKEEE
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    • v.7 no.2 s.13
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    • pp.172-180
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    • 2003
  • Based on simulation results and accompanying analysis, we suggest a thyristor-type ESD protection device structure suitable for implementation in standard CMOS processes to reduce the parasitic capacitances added to the input nodes, which is very important in CMOS RF ICs. We compare DC breakdown characteristics of the suggested device to those of a conventional NMOS protection device to show the benefits of using the suggested device for ESD protection. The characteristic improvements are demonstrated and the corresponding mechanisms are explained based on simulations. Structure dependencies are also examined to define the optimal structure. AC simulation results are introduced to estimate the magnitude of reduction in the added parasitic capacitance when using the suggested device for ESD protection. The analysis shows a possibility of reducing the added parasitic capacitance down to about 1/40 of that resulting with a conventional NMOS protection transistor, while maintaining robustness against ESD.

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Design and Implementation of Mobile Electronically Scanned TACAN Antenna (이동형 전자식 TACAN 안테나 설계 및 구현)

  • Park, Sang Jin;Koo, Kyung Heon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.1
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    • pp.54-62
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    • 2015
  • This paper describes the design and fabrication of an electronically rotated Tactical Air Navigation(TACAN) antenna using parasitic elements and PIN diode switches. We used parasitic elements arranged in a circular array and PIN diode switches to electronically rotate the antenna instead of employing a mechanically rotated antenna using motor. The antenna's physical characteristics and design features to generate the cardioid pattern and nine-lobe pattern including bearing information are described and simulated. The measured result shows a very good agreement with simulation and meets the specification of MIL-STD-291C.

A Study on Extracting the Parasitic and Intrinsic Parameters of Equivalent Circuit for Schottky Barrier Diode (Schottky barrier 다이오드의 외부 기생 소자 및 내부 소자 추출에 관한 연구)

  • 조동준;김영훈;최민수;양승인;전용구
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2000.11a
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    • pp.248-251
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    • 2000
  • 본 논문에서는 SIEMENS사의 BAS125 소자의 I-V curve에서 RF신호를 고려하여 파라미터를 추출하였으며, 바이어스에 독립적인 외부소자를 추출하고, 바이어스에 종속적인 접합캐패시터를 S-parameter를 fitting하여 추출하였다.

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Characteristics of Hydrogen Ion Implantation for SOI Fabrication (SOI 제작을 위한 수소 이온 주입 특성)

  • 김형권;변영태;김태곤;김선호;한상국
    • Proceedings of the Optical Society of Korea Conference
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    • 2003.07a
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    • pp.230-231
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    • 2003
  • SOI (Silicon On insulator)는 SiO$_2$와 같은 절연체 위에 실리콘 (Si) 박막층이 놓여있는 구조로서 전자나 광소자들이 실리콘 박막층 위에 만들어진다. SOI의 기본적인 생각은 기생 정전용량 (parasitic capacitance)을 감소시킴으로서 소자의 스위칭 속도를 더 빠르게 하는 것이다. 최근에 초고속 광소자와 단위 광소자들의 집적을 위해 실리콘 이외의 GaAs, InP, SiC 등의 반도체 박막을 절연층 위에 만드는 연구가 많이 진행되고있다. (중략)

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A Novel External Resistance Method for Extraction of Accurate Effective Channel Carrier Mobility and Separated Parasitic Source/Drain Resistances in Submicron n-channel LDD MOSFET's (새로운 ERM-방법에 의한 미세구조 N-채널 MOSFET의 유효 캐리어 이동도와 소스 및 드레인 기생저항의 정확한 분리 추출)

  • Kim, Hyun-Chang;Cho, Su-Dong;Song, Sang-Jun;Kim, Dea-Jeong;Kim, Dong-Myong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.12
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    • pp.1-9
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    • 2000
  • A new method, the external resistance method (ERM method), is proposed for accurate extraction of the gate bias-dependent effective channel carrier mobility (${\mu}_{eff}$) and separated parasitic source/drain resistances ($R_S$ and $R_D$) of n-channel MOSFET's. The proposed ERM method is applied to n-channel LDD MOSFETs with two different gate lengths ($W_m/L_m=30{\mu}m/0.6{\mu}m,\;30{\mu}m/1{\mu}m$) in the linear mode of current-voltage characteristics ($I_D-V_{GS},\;V_{DS}$). We also considered gate voltage dependence of separated $R_2$ and $R_D$ in the accurate modeling and extraction of effective channel carrier mobility. Good agreement of experimental data is observed in submicron n-channel LDD MOSFETs. Combining with capacitance-voltage characteristics, the ERM method is expected to be very useful for accurate and efficient extraction of ${\mu}_{eff},\;R_D,\;R_S$, and other characteristic parameters in both symmetric and asymmetric structure MOSFET's in which parasitic resistances are critical to the improvement of high speed performance and reliability.

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Design of Wide-band Sleeve Monopole Antenna that 4 PCS of Post Type Parasitic Element is Added (4개의 Post 형태 기생소자를 추가한 광대역 슬리브 모노폴 안테나 설계)

  • Lee, Sang-Woo;Kim, Kab-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.11 no.1
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    • pp.7-13
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    • 2007
  • In this paper, we have designed and fabricated a small size wide-band monopole antenna which can integrate the frequency of previous business mobile communication system by adding 4 PCS of post type parasitic element on top-loaded sleeve monopole antenna. We have observed the properties of return loss upon a parameter change of element, and we also examined radiation properties in the band of PCS, W-CDMA, WiBro, W-LAN and S-DMB in order to make sure the suggested antenna's wide-band properties. We have found that the proposed antenna has omni-direction in horizontal plane and figure eight-direction in vertical plane, and we could have good return loss($Return\;loss{\leq}-10\;dB$) and $1.14{\sim}3.66\;dBi$ gain in $1.67{\sim}3.55\;GHz$ of frequency range($B/W{\fallingdotsep}72%$).

Design and Fabrication of the Broadband Microstrip Array Antenna with a Conical Radiation Pattern and the Circular Plarization (원추형 복사패턴과 원편파 특성을 가지는 광대역 마이크로스트립 배열 안테나의 설계와 제작)

  • 이면주;이광욱;이수용;정문희;남상욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.11
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    • pp.1774-1784
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    • 1993
  • This paper presents the design, fabrication and measured results of the broadband microstrip array with a conical radiation pattern and the circular array composed of six square microstrip antenna elements. Each element antenna has the stacked structure with a parasitic element to achieve a broadband characteristic and a branch line quadrature hybrid is attached to it for the circular polarization. The design procedures and measured results of the scheme for obtaining the conical radiation pattern which is useful for the mobile communication via the satellite. Finally, the performance of the fabricated antenna is measured and compared with the theory.

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The Design of Electronically Beam Steeling Array Antenna Using 4 Parasitic Elements (4개의 기생 소자를 이용한 전자적인 빔 조향 배열 안테나 설계)

  • Kim, Young-Goo;Choi, Ik-Guen;Kim, Tae-Hong;You, Jong-Jun;Kang, Sang-Gee
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.20 no.2
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    • pp.167-173
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    • 2009
  • This paper proposes an electronically beam steering array antenna, consisting of single fed active element and 4 parasitic elements, operating in 5.8 GHz ISM band. Beam steering can be achieved by controlling the reactance of the variable reactance control circuit connected to the load of the parasitic elements without using the high cost phase shifters. The proposed antenna realizes ${\pm}30^{\circ}$ beam scanning of E-plane and H-plane with the below -10 dB return loss in ISM band. The gain of the $6.18{\sim}7.53\;dBi$ in E-plane and $7.022{\sim}7.779\;dBi$ in H-plane is shown in the scanning range.