• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.366-366
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• 2012

무기물 나노입자를 포함한 유기 박막인 나노 복합체를 사용하여 제작한 비휘발성 메모리 소자는 공정의 간단함과 낮은 전력구동이 가능하다는 장점 때문에 차세대 비휘발성 메모리 소자로 각광받고 있다. 다양한 나노입자를 포함한 유기 박막을 사용한 비휘발성 메모리 소자에 대한 연구는 많이 진행되었지만, 코어-쉘 나노입자가 poly (methylmethacrylate) (PMMA) 유기 박막에 분산되어 있는 나노 복합체를 활성층으로 사용하여 제작한 비휘발성 유기 메모리 소자의 전기적 특성과 메모리 메커니즘에 대한 연구는 비교적 미미하다. 본 연구에서는 코어-쉘 나노 입자가 PMMA 박막 안에 분산되어 있는 나노복합체를 사용한 비휘발성 메모리 소자를 제작하여 전기적 특성, 정보 유지력 및 메모리 스위칭 동작에 대하여 관찰 하였다. 소자 제작을 위해 hexane 안에 들어 있는 코어-쉘 나노입자를 Chlorobenzene에 용해되어 있는 PMMA에 넣어 초음파 교반기를 사용하여 나노입자를 고르게 분산하였다. 코어-쉘 나노입자가 PMMA에 고르게 분산 된 용액을 전극으로 사용 할 Indium-tin-oxide가 성장된 glass 위에 스핀코팅을 한 후 열처리를 하여 용매를 제거한 후 코어-쉘 입자가 PMMA에 분산되어 있는 박막을 형성하였다. 코어-쉘 입자가 PMMA에 분산된 나노복합체 위에 Al을 상부전극으로 열 증착하여 비휘발성 메모리 소자를 제작하였다. 제작된 소자의 전류-전압 (I-V) 특성을 측정결과는 특정한 두께에서 낮은 전도도 (ON state)와 높은 전도도 (OFF state)가 존재하는 쌍안정성 특성을 확인하였다. 코어-쉘 나노입자가 포함되지 않은 소자에서는 쌍안정성 특성이 보이지 않아 코어-쉘 나노입자가 비휘발성 메모리 소자의 기억 특성을 나타내는 중요한 저장 매체가 됨을 알 수 있었다. 제작된 메모리 소자의 메모리 동작에 대한 메커니즘 설명은 I-V와 에너지 밴드 구조를 사용하여 설명할 것이다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.435-435
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• 2012

ITER를 비롯한 실증로나 상용로급 토카막에서는 중성빔 가열이나 전류구동을 위해 1MeV이상의 빔 에너지가 요구된다. 빔 출력이 가속전압의 5/2승에 비례함에도 불구하고 양이온 빔의 경우 에너지가 높아지면 빔의 중성화 효율이 급격히 감소하여 ITER NBI의 경우 양이온 빔의 중성화 효율은 0%에 가깝다. 한편 음이온 빔은 1MeV 이상의 에너지영역에서도 빔 에너지와 거의 무관하게 60% 정도의 중성화 효율을 갖는다. 따라서 ITER는 음이온 빔을 바탕으로 한 중성빔 가열장치(N-NBI)를 채택하고 있다. 우리나라의 핵융합연구가 핵융합 발전을 지향하는한 N-NBI에 대한 연구를 시작해야 하며 그 출발점으로 음이온원 개념설계를 시작하였다. 개념설계는 음이온원 개발과정을 통해 1) 음이온 생성원리 규명, 2) 음 이온원 핵심기술 확보, 3) 음이온 및 음이온 빔 관련 진단 등을 연구할 수 있는 축소규모의 proto-type 음이온원 개발을 목표로 하였다. 음이온원 개발은, 초기에는 KAERI NB test stand 및 KAERI 이온원의 플라즈마 버켓을 활용하기 위해 filament-arc type으로 시작하지만 어느정도 기반이 확립되면 플라즈마 버켓의 electron dump를 제거하고 그 자리에 RF driver를 장착하여 궁극적으로 RF 음이온원을 개발할 계획이다. 본 학회에 발표하는 포스터는 filament-arc type 음이온원에 대한 개념설계이다. 설계된 음이온원은 Tent-type 자장필터를 장착하며, 0.5A의 수소 음이온빔 인출을 목표로 하고 있다. 이를 위해 플라즈마 버켓, 세슘 공급시스템, bias plate, 플라즈마 그리드, electron deflection 자석이 설치된 인출 그리드, 접지 그리드 등에 대한 개념설계가 이루어 졌다. 이 외에도 음이온원 전원과 진단 시스템에 대해서도 논의하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.13-18
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• 2005

In this paper, we fabricated a pixel array in which each pixel was consisted of Organic Thin Film Transistor (OTFT) serially connected with Organic Light Emitting Diode (OLED) on Poly-ethylene-terephthalate (PET) substrate and the number of pixels was 64 x 64. As a gate insulator of OTFT, the thermally cross-linked PVP was used and the organic semiconductor, Pentacene, is deposited for an active layer of OTFT considering the compatibility with PET substrate. The mobility of OTFT is $1.0\;cm^2/V{\cdot}sec$ as a discrete device, but it was reduced to $0.1\~0.2\;cm^2/V{\codt}sec$ in the array. We analyzed the operation of the array and confirmed the current driving ability of OTFTs for the OLEDs.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.11 s.353
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• pp.175-184
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• 2006

In this paper, we describe a 900MHz CMOS RF transceiver using an ISM band for ZigBee applications. The architecture of the designed rx front-end, which consists of a low noise amplifier, a down-mixer, a programmable gain amplifier and a band pass filter. And the tx front-end, which consists of a band pass filter, a programmable gain amplifier, an up-mixer and a drive amplifier. A low-if topology is adapted for transceiver architecture, and the total current consumption is reduced by using a low power topology. Entire transceiver is verified by means of post-layout simulation and is implemented in 0.18um RF CMOS technology. The fabricated chip demonstrate the measured results of -92dBm minimum rx input level and 0dBm maximum tx output level. Entire power consumption is 32mW(@1.8VDD). Die area is $2.3mm{\times}2.5mm$ including ESD protection diode pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.6
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• pp.35-42
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• 2010

This paper describes a 10 bit 80MHz CMOS D/A converter for wireless communication system. The proposed circuit in the paper is implemented with a $0.18{\mu}m$ CMOS n-well 1-poly 6-metal process. The architecture of the circuit consists of the 4bit LSB with binary decoder, and both the 3bit ULSB and the 3bit MSB with the thermometer decoder. The measurement results demonstrates SFDR of 60.42dBc at sampling frequency 80MHz, input frequency 1MHz and ENOB of 8.75bit. INL and DNL have been measured to be ${\pm}$0.38LSB and ${\pm}$0.32LSB and glitch energy is measured to be 4.6$pV{\cdot}s$. Total power dissipation is 48mW at 80MHz(maximum sampling frequency) with a single power supply of 1.8V.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.11
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• pp.9-14
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• 2007

In this article, the organic integrated circuits such as inverter, ring oscillator, NAND and NOR gates, and rectifier have been fabricated on PEN substrate by using pentacene TFTs, The OTFTs used bottom contact structure and produced the average mobility of 0.26 $cm^2/V.sec$ and on/off current ratio of $10^5$. All circuits successfully worked as the simulation results. Especially, the rectifier was able to operate up to 1 MHz input AC signals, and ring oscillator exhibited oscillation frequency of 1MHz at 40 V. Based on the results of organic integrated circuits we could confirm the possibility of the low cost RFID tags and flexible display with OTFTs.

• Journal of IKEEE
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• v.13 no.4
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• pp.82-88
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• 2009

This paper is analyzed for a step up-down DC/DC chopper of high efficiency added electric isolation. The converters of high efficiency are generally made that the power loss of the used semiconductor switching devices is minimized. To achieve high efficiency system, the proposed chopper is constructed by using a partial resonant circuit. The control switches using in the chopper are operated with soft switching by partial resonant method. The control switches are operated without increasing their voltage and current stresses by the soft switching technology. The result is that the switching loss is very low and the efficiency of the chopper is high. The proposed chopper is also added electric isolation which is used a pulse transformer. When the power conversion system is required electric isolation, the proposed chopper is adopted with the converter system development of high efficiency. The soft switching operation and the system efficiency of the proposed chopper are verified by digital simulation and experimental results.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.49-56
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• 2012

Recently, by the trends of electronic package to be smaller, thinner and more integrative, fine bump is required. but It can result in the electrical short by reduced cross-section of UBM and diameter of bump. Especially, the formation of IMCs and KV can have a significant affects about electrical and mechanical properties. In this paper, we analyzed the thermal deformation of flip-chip bump by using FEM. Through Thermal Cycling Test (TCT) of flip-chip package, We analyzed the properties of the thermal deformation. and We confirmed that the thermal deformation of the bump can have a significant impact on the driving system. So we selected IMCs thickness and bump diameter as variable which is expected to have implications for characteristics of thermal deformation. and we performed analysis of temperature, thermal stress and thermal deformation. Then we investigated the cause of the IMC's effects.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.2 no.1
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• pp.3-9
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• 2009

Although Active matrix organic light emitting diode (AMOLED) display has a better image quality in terms of viewing angle, contrast ratio, and response time than liquid crystal displays (LCDs), it still has some critical issues such as lifetime, residual images, and brightness non-uniformity due to non-uniformity in electrical characteristics of driving TFTs and IR drops on supplied power line. Among them, we improved irrecoverable residual images of AMOLED displays which is mainly related to the hysteresis characteristics of driving TFTs. We consider four kinds of surface treatment conditions before gate oxide deposition for improving hysteresis characteristics. We can reduce the hysteresis level of p-channel TFT to 0.23 V, interface trap states between the poly-Si layer and gate insulator to $3.11{\times}10^{11}cm^{-2}$, and output current variation of p-channel TFT to 3.65 % through the surface treatment using ultraviolet light and H2 plasma. Therefore, the recoverable residual image problem of AMOLED displays can be improved by surface treatment using ultraviolet light and $H_2$ plasma.

• Journal of the Korean Institute of Telematics and Electronics
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• v.19 no.6
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• pp.1-8
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• 1982

In this paper a new analytic method for Ladder networks by weighted tree is proposed. In contrast to conventional tree concept that represents only information structure, in this paper, a tree with hierarchical structure is established by giving wei체t of impedance Z and admittance Y to branch and representing each node of its branch as a pair of voltage and current. Then, by defining generation level from tree structure and by parsing between standand level and arbitrary level, driving point impedance, transfer function and transfer impedance are simultaneously obtained instead of complex calculation method by inspection. The validity of this method is proved by the reciprocal theorem and this method is applied to four-terminal constants and the feedback network.