• 전기의세계
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• v.24 no.6
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• pp.45-49
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• 1975

후막 HIC는 computer 회로뿐만 아니라, 자동차의 전압 조정기 고출력, 증폭단, 텔레비젼 CRT관의 전력 구동단등의 고출력 회로와, 텔레비젼 또는 산엽용 전자 장치의 VHF, UHF, 회로 구성에 많이 이용된다. 국내에서는 전자시계 제작에 수개 업체에서 HIC 기술을 이용하고 있다. 더 높은 주파수대인 마이크로-웨이브대 (파장이 cm대에서 mm대에 이른다)장치의 소형화는 박막 HIC에 의하여 실현되고 있다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.6
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• pp.719-725
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• 2019

We propose a 2.4-GHz CMOS power amplifier (PA) with a bypass structure to improve the power-added efficiency (PAE) in the low-power region. The primary winding of the output transformer is split into two parts. One of the primary windings is connected to the output of the power stage for high-power mode. The other primary winding is connected to the output of the driver stage for low-power mode. Operation of the high power mode is similar to conventional PAs. On the other hand, the output power of the driver stage becomes the output power of the overall PA in the low power mode. Owing to a turning-off of the power stage, the power consumption is decreased in low-power mode. We designed the CMOS PA using a 180-nm RFCMOS process. The measured maximum output power is 27.78 dBm with a PAE of 20.5%. At a measured output power of 16 dBm, the PAE is improved from 2.5% to 12.7%.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.2
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• pp.71-80
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• 1999

In this paper, a power MOSFET driver with protection circuits is designed using a 2${\mu}m$ high-voltage CMOS process. For stable operations of control circuits a power managing circuit is designed, and a voltage-detecting short-circuit protection(VDSCP) is proposed to protect a voltage regulator in the power control circuit. The proposed VDSCP scheme eliminates voltage drop caused by a series resistor, and turns off output current under short-circuit state. To protect a power MOSFET, a short-load protection, a gate-voltage limiter, and an over-voltage protection circuit are also designed A high voltage 2 ${\mu}m$ technology provides the breakdown voltage of 50 V. The driver consumes the power of 20 ~ 100 mW along its operation state excluding the power of the power MOSFET. The active area of the power MOSFET driver occupies $3.5 {\times}2..8mm^2$.

• Journal of Navigation and Port Research
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• v.27 no.5
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• pp.505-511
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• 2003

In this paper, a driving amplifier stage with 1 Watt output has been designed and fabricated, which is operating at UHF band( 470 ∼ 806 MHz) for digital TV repeater. In the driving amplifier stage, preamplifier and 1 Watt unit amplifier are integrated by one electric substrate which is 2.53 in dielectric constant and 0.8 mm thickness. When the driving amplifier stage is flown by bias voltage of 28 V DC and current of 900 mA. it has the gain of more than 53.5 dB. the gain flatness of $\pm$0.5 dB and return loss of less than -15 dB in 470 ∼ 806 MHz. Also, when two signals at 2 MHz frequency interval are input port into the driving amplifier stage with 1 Watt output, it resulted in excellent characteristics to designed specification with showing intermodulation distortion characteristics of more than 48 dBc.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.345-346
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• 2015

본 논문은 30kW, 95GHz 자이로트론을 구동하기 위한 50kV, 100kW 출력의 Cathode Power Supply(CPS) 설계에 대해 기술한다. 자이로트론 구동 시스템의 신뢰성과 효율성 향상을 위해 고효율 공진형 컨버터 토폴로지를 이용한 3개의 컨버터 모듈을 기반으로 출력단이 직렬로 구성된 모듈의 3상 운전을 통해 낮은 출력 전압 리플과 함께 아크 발생 시 부하 단으로 전달되는 에너지를 최소화 할 수 있도록 CPS를 설계한다. 또한 고전압 전원장치의 절연에 대한 신뢰성 확보와 전력밀도 향상을 위한 변압기 및 정류부의 효율적인 절연 설계 및 구현에 대하여 기술한다. 설계된 CPS의 실험결과를 통해 30kW, 95GHz 자이로 트론을 구동하기 위한 전원장치 설계의 타당성과 우수성을 검증한다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.1009-1014
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• 2012

This paper has proposed a 2,500 MHz ~ 2,570 MHz 0.13-${\mu}m$ CMOS RF front-end transmitter for LTE-Advanced systems. The proposed RF front-end transmitter is composed of a quadrature up-conversion mixer and a driver amplifier. The measurement results show the maximum output power level is +6 dBm and the suppression ratio for the image sideband and LO leakage are better than -40 dBc respectively. The fabricated chip consumes 36 mA from a 1.2 V supply voltage.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.53-54
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• 2007

이 논문에서는 구동기 용량제한을 갖는 선형시스템에 대한 저이득 추종 제어기 설계 문제를 다룬다. 주어진 시스템에 대한 추종 기준입력은 크기와 변화율에 제한을 갖는 시간에 따라 변화하는 일반적인 입력을 고려하며 제어기 설계 과정은 추종성능을 향상시키기 위한 2단계의 시스템 등가변환으로 구성된다. 먼저 제1단계에서는 잘 알려진 SVD(Singular Value Decomposition)의 원리를 활용하여 추종출력과 관련된 상태를 효율적으로 분리한 후 추종에러를 상태방정식 내에 포함하는 제2단계의 시스템 변환을 통하여 추종성능의 향상을 꾀한다. 제안된 추종 제어기의 설계 조건은 모두 LMI 형태로 표현 가능하며 잘 알려진 수치예제를 통하여 제안된 설계 기법의 효용성을 예시한다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.5
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• pp.1207-1212
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• 2011

This paper presents a study on the DSP(Digital Signal Processor) controller for the PBW(power-by-wire) system using BLDC(Brushless Direct Current) servo motor pump. The PBW hydraulic actuator was realized with hydraulic pump driven by BLDC servo motor, hydraulic cylinder and controller. This PBW system needs speed control of servo motor for linear thrust action of hydraulic cylinder. This paper implements a servo controller with vector control algorithm and MIN-MAX PWM technique. As CPU of a controller, TMS320F2812 DSP was adopted because it has PWM waveform generator, A/D converter, SPI(Serial Peripheral Interface) port and many input/output port etc.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2001.10a
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• pp.87-90
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• 2001

감속의 가장 일반적인 형태는 기어 감속일 것이다. 백래쉬를 허용할 경우 전달효율이 98%까지 얻을 수 있지만 백래쉬를 중일수록 효율은 줄어들고 기어가공의 오차가 출력으로 나타나게 되어 정밀 감속기로 쓰기 위해서는 연삭등을 해야만 하게 된다. 본 논고에서는 최근 개발된 여러 종류의 감속기의 구동원리와 그들의 장단점을 들고 로보트에의 응용성을 고찰 해보고자 한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.3
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• pp.285-293
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• 1999

In this paper, the novel digital frequency/phase controller, to control the invelter fed traveling wave type ultra-sonic m motor(USM) is proposed. This controller is used to control the drive frequency, phase difference and applied voltages of e each phase of the motor. Proposed digital controller has constructed with digital logic only, no more use digitallongleftarrowanalog h hybrid method of the conventional controller, in order to generate drive frequency and phase difference. Therefore, the c control system has become to velY simple structure. T\rvo types of controllers are designed, one is to control drive f frequency and phase difference, another has added voltage control function of each phase. Two full digital voltage/phase c controllers are implemented by using custom LSI and EPLD, the control pelformance and the simplicity ofthe proposed c controller is verified by expeJimental results.