• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.11 s.114
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• pp.1050-1057
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• 2006

This paper proposes a new predistortion linearizer with amplitude modulator and PFG(Polar Function Generator) using second order harmonic signals. This linearizer consists of PFG that combine with in-phase and quadrature-phase of second harmonic signals and amplitude modulator in main path. The predistorted third order intermodulation distortion(IMD3) signals that are generated by amplitude modulator with fundamental and PFG signals, improve a amplifier nonlinear characteristics. The proposed linearizer and amplifier have been manufactured and tested to operate in cellular base-station transmitting band$(869\sim894MHz)$. The test results show that IMD3 can be removed by more than 22.5 dB in case of CW 2-tone signals ${\Delta}f=1$ MHz, and the adjacent channel power ratio(ACPR) also can be improved by more than 8.4 dB for CDMA IS-95 1FA signals.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.2
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• pp.154-162
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output ${\gamma}$oltage in three-phase buck d diode rectifiers is presented in this paper. The proposed pulse frequency modulation method is employed to r regulate the output voltage of the buck diode rectifiers and guarantee zero-current switching of the switch over the Vvide load range. The pulse frequency control method used in tIns paper shows generally good p performance such as low THD of the input line current and unity power factor. In addition, the pulse f freιluency method can be effectively used to suppress the low frequency voltage ripple appeared in the dc output voltage. The proposed technique illustrates its validity and effectiveness through the respective s simulations and experiments.

• Journal of IKEEE
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• v.24 no.1
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• pp.19-24
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• 2020

This paper presents a 3-level, 2-level SVPWM technique with 100 kHz switching using Verilog HDL, one of the languages of FPGA. In the case of IGBT devices mainly used in inverters, they have a switching frequency around 20kHz. Recent research and development of next-generation power semiconductor devices such as GAN has enabled switching of more than 100kHz, which can miniaturize power converters, and apply various new algorithms due to the injection of harmonics. In the existing system using the IGBT, the control using the DSP is common, but the controller configuration for 100 kHz switching requires the use of FPGA. Therefore, this paper explains the theory and implementation of SVPWM applied to two-level and three-level inverters using FPGAs and verifies the performance through the output waveform. In addition, this paper implements 3-level SVPWM by using only one carrier instead of using two carriers in the conventional method.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.22 no.1
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• pp.252-264
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• 2023

This paper proposes a design of a dual-band band-pass filter that integrates a λg/2 open SIR structure, a transmission line, and a fork-type structure with symmetric and asymmetric open stubs. To obtain the dual-band effect, the proposed filter uses the SIR structure and adjusts the impedance ratio of the SIR structure. Therefore, the position of the harmonics of the filter is shifted through the adjustment of the impedance ratio, and this can obtain a double-band effect. In order to obtain the dual-band characteristics, the dual-band effect is obtained by inserting a open stub between the SIR structures with the SIR structure divided in half. In addition, the second frequency response is obtained by adjusting the length of the open symmetrical stub in the fork-shaped structure. The asymmetrical open stub in the fork form achieves optimum bandwidth by adjusting the length. Therefore, the first center frequency of the proposed band-pass filter is 5.896 GHz and the bandwidth is 13.6 %. At this time, the measurement results are 0.13 dB and 33.6 dB. The second center frequency is 5.906 GHz and the bandwidth is 13.6 %. At this time, the measurement results are 0.15 dB and 19.8 dB. The reason is that when the impedance ratio (Δ) is higher than 1, the position of the harmonic is shifted to a lower frequency band. However, if the impedance ratio (Δ) is lowered by one step, the position of harmonics will move to a higher frequency band. The function of the filter designed using these characteristics can be obtained from the measurement result. The proposed band-pass filter has no coupling loss and no via energy concentration loss because there is no coupling structure of input/output and no via hole. Therefore, system integration is possible due to its excellent performance, and it is expected that dedicated short-range communication (DSRC) system applications used in traffic communication systems will be possible.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.36 no.2
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• pp.117-125
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• 2000

The waveform and spectrum analysis of Tursiops truncatus(bottlenose dolphin) sonar signals were carried out on the basis of data collected during the dolphin show at the aquarium of Cheju Pacificland from October 1998 to February 1999. When greeting to audience, the pulse width, peak frequency and spectrum level from the five dolphins'sonar signals were 3.0ms, 4.54kHz and 125.6dB, respectively. At the time of warm-up just before the show, their figures were 5.0㎳, 5.24kHz and 127.0dB, respectively. During the performance of dolphins, with singing, peak frequency ranged 3.28∼5.78kHz and spectrum level ranged 137.0∼142.0dB. With playing ring, pulse width, peak frequency and spectrum level were 7.0㎳, 2.54kHz and 135.9dB, and when playing the ball, the values were 9.0㎳, 2.78kHz and 135.2dB, respectively. The values determined from the five dolphins during jump-up out of water were : pulse width 2.0㎳, peak frequency 4.50kHz and spectrum level 126.8dB. When they responded to trainer's instructions, the values were 2.25㎳, 248kHz and 148.7dB, respectively, and greeting to audience, the peak frequency and spectrum level were 5.84kHz and 122.5dB. During swimming under water, peak frequency and spectrum level were determined to be 10.10kHz and 126.8dB. It was found that there exited close consistencies in pulse width, frequency distribution and spectrum level between whistle sounds and dolphin's sonar signals. Accordingly, the dolphins can be easily trained by using whistle sound based on the results obtained from the waveform and spectrum of the dolphin's sonar signals.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.41 no.6
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• pp.440-447
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• 2013

In this paper, a higher harmonic control (HHC) methodology is applied to find the optimum input scenario for the vibratory hub loads reduction. A comprehensive aeroelastic analysis code, CAMRAD II, is used to model the HART (Higher-harmonic-control Aeroacoustic Rotor Test) II rotor, and parametric study is conducted for the best HHC inputs leading to a minimum vibration (MV) condition. The resulting outcomes are compared with the earlier HART II test results. It is indicated that the control input adopted in the MV condition showed less satisfactory results. The new MV condition obtained in the present investigation can achieve 45% lower vibration level than the baseline uncontrolled condition. The optimum HHC input results lead to 3/rev harmonic input having $0.8^{\circ}$ amplitude and $350^{\circ}$ phase angle. About 5% reduction in the required power is possible but accompanies with the increase of vibration level.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.6
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• pp.833-842
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• 1998

In this paper, a K-band oscillator which is composed of a hair-pin resonator, a GaAs MESFET, and a frequency doubler, is suggested, implemented by HMIC(Hybrid Microwave Integrated Circuits) form, and characterized for its microwave performance. A $\lambda_g$/4 open stub is used in frequency doubler to suppress the fundamental frequency of 9 GHz which is the output of the hair-pin resonator oscillator and output matching network is optimized for its second harmonic freuency of 18 HGz. For the oscillator, the output power of -0.83 dBm, the fundamental frequency suppression of -23 dBc, and phase noise of -86 dBc/Hz at 18.20 GHz are obtained.

• Journal of Advanced Navigation Technology
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• v.18 no.5
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• pp.483-489
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• 2014

Proposed electronic ballast circuit for harmonic reduction includes adding lossless snubber circuit to DC-DC converter. To get inverter for changing DC-AC, a lamp has been changed to equivalence resistance in the standard lamp voltage and current data, also inverter circuit has been interpreted by being changed to R, L, C equivalence circuit. Using converted equivalent circuit, the most suitable circuit constant which can satisfy the characteristics of fluorescent lamps has been decided on and finally designed. It could not only eliminate distortion waveform from pulsation frequency in inverter direct side current but also reduce considerably pulsation rate and switching loss by making input current of inverter discontinuous. The validity for the results of this study has been verified through the experiment to measure harmonic occurrence after applying a newly-manufactured product of electronic ballast to 40 W line tube style fluorescent lamps.

• Journal of Satellite, Information and Communications
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• v.12 no.4
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• pp.115-119
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• 2017

Intermodulation distortion degrades the S/N(signal-to-noise) of the original signal and also affects the adjacent channels. Intermodulation distortion is mainly caused by the nonlinear characteristics of the power amplifier. If the power amplifier with nonlinear characteristics has a memory effect, the intermodulation distortions occurred in the power amplifier are generated in various and complex forms. The predistorter is used as a way to improve intermodulation distortions. In order to efficiently utilize the performance of the predistorter, the memory effect of the power amplifier must be reduced. In this paper, we describe the design method of bias circuit to reduce the memory effect in power amplifiers. To reduce the memory effect, the bias circuit must have a high impedance for the signal and a low impedance for the envelope(modulating signal) and the second harmonic component of the signal. To verify the performance of the bias circuit designed considering the memory effect, a power amplifier operating at 170 ~ 220MHz was designed and implemented. The designed bias circuit has a large impedance in the operating frequency band and low impedance in the envelope signal and the second harmonic of the signal. As a result of the performance measurement, it was found that the asymmetric intermodulation distortion component is improved by 3.7dB.

• Journal of Advanced Navigation Technology
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• v.12 no.2
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• pp.122-131
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• 2008

In this paper, an S-band oscillator of the low phase noise property using miniaturized microstrip hairpin shaped ring resonator has been designed and implemented. The TACONIC's RF-35 substrate has a dielectric constant ${\varepsilon}_r$=3.5 a thickness h=20mil a copper thickness t=17 um and loss tangent $tan{\delta}$=0.0025. The designed and implemented 2.45 GHz oscillator shows low phase performance of -100.5 dBc/Hz a 100kHz offset. Output power 20.9 dBm at center frequency 2.45 GHz and harmonic suppression -32 dBc. The circuit was implemented with hybrid technique. But can be fully compatible with the RFIC's, MIC and MMIC due to its entirely planar structure.