• Title/Summary/Keyword: 고정링

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Phosphatidic Acid Production by PLD Covalently Immobilized on Porous Membrane (공유결합으로 다공성 막에 고정화된 PLD에 의한 포스퍼티딕산 생산)

  • Park, Jin-Won
    • Clean Technology
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    • v.21 no.4
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    • pp.224-228
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    • 2015
  • Phospholipase D (PLD) was immobilized on a submicro-porous membrane through covalent immobilization. The immobilization was conducted on the porous membrane surface with the treatment of polyethyleneimine, glutaraldehyde, and the anhydrase, in sequence. The immobilization was confirmed using X-ray photon spectrometer. The pH values of phosphatidylcholine (PC) dispersion solution with buffer were monitored with respect to time to calculate the catalytic activities of PC for free and immobilized PLD. The catalytic rate constant values for free PLD, immobilized PLD on polystyrene nanoparticles, and immobilized PLD on a porous cellulose acetate membrane were 0.75, 0.64, and 0.52 s-1, respectively. Reusability was studied up to 10 cycles of PC hydrolysis. The activity for the PLD immobilized on the membrane was kept to 95% after 10 cycles, and comparable to the PLD on the nanoparticles. The stabilities for heat and storage were also investigated for the three cases. The results suggested that the PLD immobilized on the membrane had the least loss rate of the activity compared to the others. From these studies, the porous membrane was feasible as a carrier for the PLD immobilization in the production of phosphatidic acid.

Design and Fabrication of on Oscillator with Low Phase Noise Characteristic using a Phase Locked Loop (위상고정루프를 이용한 낮은 위상 잡음 특성을 갖는 발진기 설계 및 제작)

  • Park, Chang-Hyun;Kim, Jang-Gu;Choi, Byung-Ha
    • Journal of Navigation and Port Research
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    • v.30 no.10 s.116
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    • pp.847-853
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    • 2006
  • In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

Control Method of Adaptive Duty-cycling for Monitoring System in Excavations (굴착현장 모니터링 시스템을 위한 적응적인 듀티사이클링 제어 기법)

  • Kim, Taesik;Min, Hong;Jung, Jinman
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.6
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    • pp.141-146
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    • 2016
  • Geotechnial engineering projects that requires excavation activity can cause massive ground deformation and this can damage adjacent structures. Depending on the engineering characteristics of ground material and the excavation depth, the ground movement is various. To overcome this issue, the ground deformation is monitored by multiple sensors. Typically, an inclinometer is installed behind the support wall. In this paper, we present an adaptive duty-cycling control mechanism using wireless sensors for monitoring ground deformation in excavations. The proposed mechanism dynamically adjusts the sleep time based on the urgency degree of sensed data from inclinometer. Through analytical evaluation of expected latency time, we confirm our adaptive duty-cycling mechanism has lower latency compared with periodic duty-cycling mechanism under variable conditions.

The real-time scheduling algorithms based on the Insertion technique and Two-way SCAN technique (삽입기법과 양방향 스캔 기법에 기반한 실시간 디스크 스케줄링 알고리즘)

  • Lee Myung Sub;Park Chang Hyeon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6B
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    • pp.377-386
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    • 2005
  • Recently, to increase throughput per hour on real-time disk scheduling, a lot of algorithms that apply SCAN technique to EDF(Earliest Deadline First) that is representative real-time disk scheduling algorithm are studied. However, existing disk scheduling algorithms have several limitations because they consider continuous I/O requests when create SCAN group. Also, because SCAN technique was fixed direction, the existing algorithms have shortcoming that there are a lot of time damages. This paper proposes a new real-time disk scheduling algorithm based on the insertion technique and the two-way SCAN technique to solve the problems of the exiting real-time disk scheduling algorithms in hard real-time system. The simulation result shows that, when using our techniques, the disk throughput and the number of serviceable I/O requests are enhanced.

압축성을 고려한 캘린더 닙 내에서의 열전달 현상에 대한 해석

  • 이학래;박선규
    • Proceedings of the Korea Technical Association of the Pulp and Paper Industry Conference
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    • 2000.11a
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    • pp.117-117
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    • 2000
  • 제지공정의 마지막 단계인 캘린더는 지필의 표면을 평활하게 하고 두께를 감소시켜 균일 하게 하는 역할을 한다. 하지만 캘린더링은 인장강도 둥의 강도적 성질과 불투명도 등 광학 적 성질을 저하시키는 공정이기도 하다. 따라서 캘린더령 공정에 의한 제품 품질의 저하를 극소화하기 위해서는 공정인자의 엄밀한 관리가 요청된다. 캘린더링의 주요 공정인자에는 온도와 압력, 닙 체류시간, 유입지의 함수율, 유입지의 온도 롤의 재질 등이 있다. 이 가운 데 특히 캘린더링 온도와 압력은 주요한 공정 인자이다. 따라서 이들 변수에 의한 캘린더링 공정의 변화를 정확하게 파악하는 것은 매우 중요하다. 캘린더링 공정의 속도와 관련된 닙 체류시간과 유입지의 함수율, 유입지의 온도, 롤의 재질 등은 실제 공정에서 변화시키기 어 려운 반면 온도와 압력은 조절이 비교적 용이한 특정도 지니고 있다. 캘린더링 전후의 종이의 물성 차이는 지필 내부로의 열 침투에 의한 열변형에 따라 크게 달라진다. 셀룰로오스는 유리전이온도 이상으로 가열되면 그 성질이 크게 변화하므로 캘린 더링 시의 온도가 유리전이온도보다 높거나 낮은 경우 캘린더링된 종이의 물성 차이가 크게 달라질 수 밖에 없다. 캘린더령은 비정상상태에서 진행되기 때문에 지펼의 내층보다는 표층 으로부터 순차적으로 열변형이 발생하는 공정이다. 그러므로 지필의 두께 방향으로의 열 침 투 현상의 해석을 통하여 캘린더링 시 유리전이온도가 어느 깊이까지 도달하는가를 파악하 는 것은 캘린더링 공정의 해석에 매우 중요하다. 캘린더링 공정에서 발생하는 열전달현상 해석 시 지필의 압축을 고려하지 않고 비압축성 물질로 가정하는 것은 캘린더링 공정 인자 중 압력에 의한 영향을 제대로 평가하지 못하는 한계를 지니게 된다. 따라서 본 연구에서는 지펼의 압축성을 고려하여 캘린더링 모델을 정립 하고, 이를 토대로 캘린더링 공정 조건에 따른 열 침투 현상을 해석코자 하였으며, 그 방법으 로 수치해석기법을 도입하였다. 또 실제 캘린더링 전후의 두께 변화를 측정하여 유리전이온도 의 도달 깊이와 비교하였다. 지필의 압축 정도는 롤의 직경과 닙 폭을 이용하여 MD 방향으 로 함수화하였으며, 열전달 계수로는 겉보기 값을 사용하였다. 이때 지펼은 균질한 것으로 가 정하였다. 함수율은 유리전이온도를 좌우하는 가장 큰 인자이나 본 연구에서는 항온항습처리 를 통해 유입지의 함수율을 고정시켰으며 캘린더링 시 함수율의 변이는 없다고 가정하였다. 그 결과 열침투깊이가 증가할수록 지필은 보다 변형되기 쉬운 상태가 되어 주어진 압력 조건에 대해 소성변형 정도가 증가하는 것으로 나타났다. 이는 캘린더링 전후에 두께 변화를 측정하여 정량적으로 평가할 수 있었다. 수치해석기법을 통해 같은 압력 조건에서 온도가 증 가함에 따라 혹은 같은 온도 조건에서 압력이 증가함에 따라 지필 내의 유리전이온도의 침투 깊이가 증가함을 알 수 있었으며 이는 캘린더링 전후의 두께 변화의 측정 결과와 일치하였 다. 또 NRT가 증가함에 따라서도 유리전이온도 침투 깊이가 증가하였다.

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Design of a RF fixed phase control circuit using I&Q Demodulator (I&Q Demodulator를 이용한 RF 고정 위상 제어기 설계)

  • Park, Ung-Hee;Chang, Ik-Soo;Huh, Jun-Won;Gang, In-Ho
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.1
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    • pp.8-14
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    • 1999
  • The active devices used at microwave frequency have the different phase shift according to input power. Especially, The difference of the phase shift is large in the saturation region of the amplifier. In this paper, we disigned the phase control system for fixing the different phase shift at device. With the high frequency nonlinear amplifier, we fabricated such system that the phase shift to be fixed automatically using the varible phase shifter. The variable phase shifter fixed total phase variation of the circuit using the information that was obtained from the comparison of imputsignal phase with output signal phase. Even though the input signal is 2-tone or FM type, we could estimate and also fix the phase variation on DUT Dynamic range is about 10dB. It has been experimented at 1960MHz using Teflon (H=31mil, ${\varepsilon}r$=3.2)

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Design of Phase Locked Dielectric Resonator Oscillator with Low Phase Noise for X-band (저위상잡음을 갖는 X-band용 위상고정 유전체 공진 발진기의 설계 및 제작)

  • 류근관
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.1
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    • pp.34-40
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    • 2004
  • The PLDRO(Phase-Locked Dielectric Resonator Oscillator) with low phase noise is designed for X-band. The phase of VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is locked to that of a high stable reference oscillator by using a SPD(Sampling Phase Detector) to improve phase noise performance in the loop bandwidth. And, the VCDRO is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. This PLDRO exhibits the harmonic rejection characteristics of 51.67㏈c and requires below 1.95W. The phase noise characteristics are performed as -107.17㏈c/Hz at 10KHz offset frequency and -113.0㏈c/Hz at 100KHz offset frequency, respectively, at ambient. And the output power of 13.0㏈m${\pm}$0.33㏈ is measured over the temperature range of $-20 ∼ +70^{\circ}C$ .

Effects of Imperfect Fixing at the Active End of Spring-top Resonant Column Apparatus (주동단에 반력으프링이 부착된 공진우 시험기에서 우동단 불완전 고정의 영향)

  • 민덕기
    • Geotechnical Engineering
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    • v.6 no.1
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    • pp.7-14
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    • 1990
  • The two degree of freedom model is proposed to study the effects of imperfect fixing at the active end of spring-top resonant column apparatus. A computer program using the SYMPHONY spreadsheet is developed to calculate the dimensionless frequency, F, from which modulug can be determined. It is found that the effect of reaction mass through the parameter Tr on dimensionless frequency, F, can not be ignored if Tr$\leq$20. As To increases, the variation of F increases. But for Tr$\geq$ 20, the effect of To becomes small. It is recommended that T. be greater than 20 if single degree of freedom model is rosed to determine modulus of soil. It also is found that damping ratios of specimen and apparatus do not strongly affect the dimensionless frequency, F.

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Burst-mode Clock and Data Recovery Circuit in Passive Optical Network Implemented with a Phase-locked Loop (수동 광 가입자망에서의 위상고정루프를 이용한 버스트모드 클럭/데이터 복원회로)

  • Lee, Sung-Chul;Moon, Sung-Young;Moon, Gyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.21-26
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    • 2008
  • In this paper, a novel 622Mbps burst-mode clock and data recovery (CDR) circuit is proposed for passive optical network (PON) applications. The CDR circuits are implemented with 0.35um CMOS process technology. Locking dynamics is accomplished with instantaneous feature and data are sampled at an optimal timing. This is realized by seven different delay configurations, which are generated from precisely-controlled delay buffers. The experimental results show that the proposed CDR circuits are operating as expected, recovering an incoming 622Mbps burst-mode input data without errors.

A Study on the Moving Object Tracking Algorithm of Static Camera and Active Camera in Environment (고정카메라 및 능동카메라 환경에서 이동물체 추적 알고리즘에 관한 연구)

  • 남기환;배철수
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.2
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    • pp.344-352
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    • 2003
  • An effective algorithm for implementation of which detects moving object from image sequences. predicts the direction of it. and drives the camera in real time is proposed. In static camera, for robust motion detection from a dynamic background scene, the proposed algorithm performs statistical modeling of moving objects and background, and trains the statistical modeling of moving objects and background, and trains the statistical feature of background with the initial parts of sequence which have no moving objects. Active camera moving objects are segmented by following procedure, an improved order adaptive lattice structured linear predictor is used. The proposed algorithm shows robust object tracking results in the environment of static or active camera. It can be used for the unmanned surveillance system, traffic monitoring system, and autonomous vehicle.