• Title/Summary/Keyword: 고속 디지털 샘플러

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Development and Test Result of Fast Digital Conversion System with Variable Sampling Frequencies for Astronomical Radio Siginal Processing (우주 전파 신호 처리용 가변 샘플링 고속 디지털 변환 장치 개발)

  • Kang, Yong-Woo;Song, Min-Gyu;Kim, Hyo-Ryoung
    • The Journal of the Korea institute of electronic communication sciences
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    • v.16 no.6
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    • pp.1175-1182
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    • 2021
  • The receiver of each radio telescope of KVN, has a sampler that converts astronomical radio signal to digital data. The ability of this sampler (the bandwidth, sampling frequency, and sampling bits) is improved by sqrt(n), if the bandwidth is increased by n times, and the number of observable objects increases exponentially in the case of continum spectrum radio sources. As the bandwidth increases, there are the more spectrum lines that can be simultaneously monitored in the radio source. This will greatly expand the research area in astronomical radio observation. For this reason, we are trying to independently develop the technology of the fast digital sampler. Therefore, based on the research experience and technology accumulated so far, An ability of sampling up to 3.5 GHz, that can vary the sampling frequency and can observe in a wider band, was designed and made for proto-type. In this study, we introduce the development details and test results for new sampling system.

Development and Observation Result of High Speed Digital Conversion System of Astronomical Radio Siginal (우주 전파 신호의 고속 디지털 변환 장치 개발과 적용)

  • Kang, Yong-Woo;Song, Min-Gyu;Wi, Seog-Oh;Je, Do-Heung;Lee, Sung-Mo;Kim, Seung-Rae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.6
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    • pp.1009-1018
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    • 2017
  • We developed new Digital Sampler for KVN(: Korean VLBI Network). The sampler has 1024MHz sampling frequency with 2bits/sample. The sampler's input reference frequencies are 1pps(: pulse per second) and 10MHz, also UTC(: Universal Time Coordinated) time information out with 1PPS signal, synchronized. The output of sampling data is adapted VSI(: VLBI Standard Interface) specification including the time information. In order to confirm the performance of the sampler, we carried out the astronomical radio observation test in Ulsan Radio Observatory of KVN. It was confirmed the stable performance. In this paper, We introduce the new developed sampler and present the observational test result.

KVN 초고속 샘플러 Proto-Type 개발

  • Gang, Yong-U;Wi, Seok-O;Je, Do-Heung;Nam, Uk-Won;Song, Min-Gyu;Bang, Seung-Cheol;Han, Seok-Tae
    • The Bulletin of The Korean Astronomical Society
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    • v.37 no.2
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    • pp.214.2-214.2
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    • 2012
  • 한국우주전파관측망(KVN) 4 주파수 동시관측시스템의 각 수신기에는 전파 신호를 디지털 신호로 바꾸는 샘플러가 있다. 이 장치는 전파 신호를 처리하는 중요한 구성으로서, 샘플러의 성능에 따라 관측의 품질에 영향을 준다. 이 구성 장비의 자체 제작 능력 및 기반 기술을 확보하여 효율적이고 양질의 관측이 이루어 질 수 있도록 할 필요가 있다. 본 연구에서는 KVN 샘플러의 국산화를 위하여, GHz 샘플러 Proto-Type을 설계하고 제작하였다. 이는 KVN 확대 사업 수행 시 시스템 자체 개발 능력을 키우고, 고속 거대 전파 관측 시스템을 구축하는 국제 공동 연구에 기술 참여를 하며, 차세대 우주 탐사 지원을 위한 기술 토대가 될 것이다. 이에 그 내용을 소개하고자 한다.

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A study on the implementation of high-speed record/playback system for processing large-quantity data of 1Gbps (1Gbps급 대용량 데이터처리를 위한 고속기록/재생 시스템 구축에 관한 연구)

  • Oh, Se-Jin;Roh, Duk-Gyoo;Yeom, Jae-Hwan;Kim, Bum-Kook;Hwang, Chul-Jun;Kim, Kwang-Dong;Jung, Gu-Young
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.404-406
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    • 2006
  • 본 논문에서는 우주전파를 VLBI 관측시스템으로 관측한 후 고속으로 저장/재생하기 위한 시스템 구축에 관해 소개한다. 한국천문연구원에서는 2001년부터 국내 유일의 VLBI관측 시스템으로써 한국우주전파관측망(Korean VLBI Network; KVN)을 구죽하고 있다. KVN에서는 1Gsps/2bit 우주전파를 샘플링하는 샘플러와 디지털필터로 구성된 자료획득 시스템(Data Acquisition System; DAS)을 갖출 예정이다. 관측된 우주전파는 샘플러와 DAS를 통하여 처리된 데이터를 1Gbps이상의 속도로 기록된다. 본 논문에서는 1Gbps급의 대용량 데이터를 처리할 수 있는 시스템으로써 Mark5B 시스템의 구축과 시스템 구성, VSI-H, 시스템 운용 및 실험결과 등에 대해서 기술하고자 한다.

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A Block FIR Filtering Architecture for IF Digital Down Converter (IF 디지털 다운 컨버터의 블록 FIR 필터링 아키텍처)

  • Jang, Young-Beom
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.37 no.5
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    • pp.115-123
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    • 2000
  • In this paper, a block FIR(Finite Impulse Response) filtering architecture is proposed for IF digital down converter. Digital down converter consists of digital mixers. decimation filters and down samplers. In this proposed structure, it is shown that a efficient parallel decimation filter architecture can be produced by cancellation of inherent up sampling of the block filter and following down sampler Furthermore. it is shown that computational complexity of the proposed architecture is reduced by exploiting the block FIR structure and zero values of the digital mixers.

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Design of a CMOS Time to Digital Converter with 25ps Resolution (25ps 해상도를 가진 CMOS Time to Digital 변환기설계)

  • Choi, Jin-Ho;Kang, Jin-Ku
    • Journal of IKEEE
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    • v.8 no.2 s.15
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    • pp.166-171
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    • 2004
  • This paper describes a CMOS time to digital converter (TDC) that measures the interval between two signals and converts to a digital signal. There are various methods to measure the time interval. But several architectures have a limitation in resolution and in conversion time. Moreover, they have complex algorithms. But the proposed TDC circuit has achieved a high resolution (25ps) by using a high-speed digital sampler and simple algorithm. The sampler detects when input signals comes into the TDC and output is coded. The proposed multiphase clock generator was also implemented to achieve 25p resolution.

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Study on signal processing techniques for low power and low complexity IR-UWB communication system using high speed digital sampler (고속 디지털 샘플러 기술을 이용한 저전력, 저복잡도의 초광대역 임펄스 무선 통신시스템 신호처리부 연구)

  • Lee, Soon-Woo;Park, Young-Jin;Kim, Kwan-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.12 s.354
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    • pp.9-15
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    • 2006
  • In this paper, signal processing techniques for noncoherent impulse-radio-based UWB (IR-UWB) communication system are proposed to provide system implementation of low power consumption and low complexity. The proposed system adopts a simple modulation technique of OOK (on-oft-keying) and noncoherent signal detection based on signal amplitude. In particular, a technique of a novel high speed digital sampler using a stable, lower reference clock is developed to detect nano-second pulses and recover digital signals from the pulses. Also, a 32 bits Turyn code for data frame synchronization and a convolution code as FEC are applied, respectively. To verify the proposed signal processing techniques for low power, low complexity noncoherent IR-UWB system, the proposed signal processing technique is implemented in FPGA and then a short-range communication system for wireless transmission of high quality MP3 data is designed and tested.