• Journal of the Microelectronics and Packaging Society
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• v.27 no.4
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• pp.97-105
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• 2020

Recently, as the data speed and operating frequencies of Ethernet keeps increasing, electro magnetic interference (EMI) also becomes increasing. The generation of such EMI will cause malfunction of near electronic devices. In this study, EMI filters were applied to reduce the EMI generated by DC-DC SMPS (switching mode power supply), which is the main cause of EMI generation of Ethernet switch. As the EMI filter, MLCCs with excellent withstanding voltage characteristics were used, which had advantages in miniaturization and mass production. Two types of EMI MLCC filters were used, which are X-capacitor and X, Y-capacitor. X-capacitor was composed of 2 MLCCs with 10 nF and 100 nF capacity and 1 Mylar capacitor. Y-capacitor was consisted of 6 MLCCs with a capacity of 27 nF. When only X-capacitor was applied as EMI filter, the conductive EMI field strength exceeded the allowable limit in frequency range of 150 kHz ~ 30 MHz. The radiative EMI also showed high EMI strength and very small allowable margin at the specific frequencies. When the X and Y-capacitors were applied, the conductive EMI was greatly reduced, and the radiation EMI was also found to have sufficient margin. In addition, X, Y-capacitors showed very high insulation resistance and withstanding resistance performances. In conclusion, EMI X, Y-capacitors using MLCCs reduced the EMI noise effectively and showed excellent electrical reliability.

• Journal of the Korean Society of Radiology
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• v.17 no.7
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• pp.1133-1138
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• 2023

This study analyzed the relationship between image parameters and specific absorption rate (SAR) in various sequence environments to optimize SAR. For this purpose, image parameters were adjusted for T2, T1, STIR, T1 FLAIR, and T2 FLAIR sequences in a 3.0T MRI, and the whole body (WB) SAR and head SAR calculated by the device were measured. Then, the SAR was evaluated by adjusting the number of images and the flip angle (FA) of the refocusing RF. As a result, SAR increased as the number of image increased in all sequences. T1 and T1 FLAIR had correlation coefficients (r) of 0.876, 0.876 (WB SAR, head SAR), 0.867, 0.867 (WB SAR, head SAR), respectively, and STIR had the highest correlation with 0.898 and 0.899 (WB SAR, head SAR). showed (p<0.05). When applied by increasing the refocusing FA, WB SAR and head SAR increased overall in all sequences. The T1 and T2 sequences showed high correlation with correlation coefficients (r) of 0.897, 0.898 (WB SAR, head SAR) and 0.914, 0.915 (WB SAR, head SAR), respectively, while the sequences to which the inversion recovery technique was applied had relatively low FA, showed less sensitivity to increase. Therefore, in a sequence with a relatively low TR, minimizing the number of image and applying the fast spin echo to reduce the refocusing FA in a sequence with a high duty cycle are effective in reducing SAR.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.2 s.308
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• pp.19-29
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• 2006

As the security of personal information is becoming more important in mobile phones, we are starting to apply iris recognition technology to these devices. In conventional iris recognition, magnified iris images are required. For that, it has been necessary to use large magnified zoom & focus lens camera to capture images, but due to the requirement about low size and cost of mobile phones, the zoom & focus lens are difficult to be used. However, with rapid developments and multimedia convergence trends in mobile phones, more and more companies have built mega-pixel cameras into their mobile phones. These devices make it possible to capture a magnified iris image without zoom & focus lens. Although facial images are captured far away from the user using a mega-pixel camera, the captured iris region possesses sufficient pixel information for iris recognition. However, in this case, the eye region should be detected for accurate iris recognition in facial images. So, we propose a new fast iris detection method, which is appropriate for mobile phones based on corneal specular reflection. To detect specular reflection robustly, we propose the theoretical background of estimating the size and brightness of specular reflection based on eye, camera and illuminator models. In addition, we use the successive On/Off scheme of the illuminator to detect the optical/motion blurring and sunlight effect on input image. Experimental results show that total processing time(detecting iris region) is on average 65ms on a Samsung SCH-S2300 (with 150MHz ARM 9 CPU) mobile phone. The rate of correct iris detection is 99% (about indoor images) and 98.5% (about outdoor images).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.98-106
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• 2009

This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.58-68
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• 2006

This work proposes a 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS A/D Converter (ADC) for high-performance integrated systems such as next-generation DTV and WLAN simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The input SHA maintains 10b resolution with either gate-bootstrapped sampling switches or nominal CMOS sampling switches. The SHA and two MDACs based on a conventional 2-stage amplifier employ optimized trans-conductance ratios of two amplifier stages to achieve the required DC gain, bandwidth, and phase margin. The proposed signal insensitive 3-D fully symmetric capacitor layout reduces the device mismatch of two MDACs. The low-noise on-chip current and voltage references can choose optional off-chip voltage references. The prototype ADC is implemented in a 0.13um 1P8M CMOS process. The measured DNL and INL are within 0.24LSB and 0.35LSB while the ADC shows a maximum SNDR of 54dB and 48dB and a maximum SFDR of 67dB and 61dB at 200MS/s and 250MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 85mW at 250MS/s at a 1.2V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.5 s.108
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• pp.461-475
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• 2006

In this paper, it is described about the tri-band mobile antenna system design to provide broadband multimedia and direct broadcasting services using goo-stationary Koreasat 3, simultaneously operated in Ka/K/Ku band. The radiating part of the antenna system with a fan beam characteristic in the elevation plane is composed of the quasi-offset dual shaped reflector and the tri-band feeder. The tri-band feeder is also composed of the Ka/K dual band feeder with the protruding dielectric rod, the circular polarizer, the ortho-mode transducer and the circular-polarized Ku band feed array. Especially, the Ka/K dual band circular polarizer was realized firstly using the comb-type structure. For fast satellite-tracking on the movement, the Ku band feed array has the structure of the $2{\times}2$ active phased array which can make electrical beams. And, the circular-polarized characteristic in the feed array was improved by $90^{\circ}$ rotating arrangement of four radiating elements polarized circularly by a $90^{\circ}$ hybrid coupler, respectively. Four beam forming channels to make electrical beams at Ku band are divided into the main beam channel and the tracking beam channel in the output, and noise temperature characteristics of each channel were analyzed on the basis of the contributions of internal sub_units. From the fabricated antenna system, the output power at $P_{1dBc}$ of Ka_Tx channel was measured more than 34.1 dBm and the measured noise figures of K/Ku_Rx channels were less than 2.4 dB and 1.5 dB, respectively, over the operating band. The radiation patterns with co- and cross-polarization in the tri-band were measured using a near-field measurement in the anechoic chamber. Especially, Ku radiation patterns were measured after correcting each initial phase of active channels with partial radiation patterns obtained from the independent excitation of each channel. The antenna gains measured in Ka/K/Ku band of the antenna system were more than 39.6 dBi, 37.5 dBi, 29.6 dBi, respectively. And, the antenna system showed good system performances such as Ka_Tx EIRP more than 43.7 dBW and K/Ku_Rx G/T more than 13.2 dB/K and 7.12 dB/K, respectively.

• Journal of Biosystems Engineering
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• v.7 no.2
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• pp.18-29
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• 1983

A low cost and versatile data acquisition system for the field and laboratory use was developed by using a single board microcomputer. Data acquisition system based on a Z80 microprocessor was built, tested and modified to obtain the present functional system. The microcomputer developed consists of 6 kB ROM, 5 kB RAM, 6-seven segment LED display, 16-Hex. key and 8 command key board. And it interfaces with an 8 channel, 12 bits A/D converter, a microprinter, EPROM programmer for 2716, and RS232C interface to transfer data between the system and HP3000 mini-computer manufactured by Hewlett Packard Co., A software package was also developed, tested, and modified for the system. This package included drivers for the AID converter, LED display, key board, microprinter, EPROM programmer, and RS232c interface. All of these programs were written in 280 assembler language and converted to machine codes using a cross assembler by HP3000 computer to the system during modifying stage by data transferring unit of this system, then the machine language wrote to the EPROM by this EPROM programmer. The results are summarized as follows: 1. Measuring program developed was able to control the measuring intervals, No. of channels used, and No. of data, where the maximum measuring speed was 58.8 microsec. 2. Calibration of the system was performed with triangle wave generated by a function generator. The results of calibration agreed well to the test results. 3. The measured data was able to be written into EPROM, then the EPROM data was compared with original data. It took only 75 sec. for the developed program to write the data of 2 kB the EPROM. 4. For the slow speed measurements, microprinter instead of EPROM programmer proved to be useful. It took about 15 min. for microprinter to write the data of 2 kB. 5. Modified data transferring unit was very effective in communicating between the system and HP3000 computer. The required time for data transferring was only 1~2 min. 6. By using DC/DC converting devices such as 78-series, 79-series. and TL497 IC, this system was modified to convert the only one input power sources to the various powers. The available power sources of the system was DC 7~25 V and 1.8 A.