• Title/Summary/Keyword: 게이트길이

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A Study on the Subthreshold Swing for Double Gate MOSFET (더블게이트 MOSFET의 서브문턱스윙에 대한 연구)

  • Jung, Hak-Kee;Dimitrijev, Sima
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.4
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    • pp.804-810
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    • 2005
  • An analytical subthreshold swing (SS) model has been presented for double gate MOSFET(DGMOSFET) in this study. The results calculated by this model are more precise for about 10nm channel length and thickness than those derived from the previous models. The results of this model are compared with Medici simulation to varify the validity of this model, and good agreementes have been obtained. The changes of SS have been investigated for various channel lengths, channel thicknesses and gate oxide thicknesses using this model, given that these parameters are very important in design of DGMOSFET. This demonstrates that the proposed model provides useful data for design of nano-scale DGMOSFET. It is Known that the SS is improved to smaller ratios of channel thickness vs channel length and is smaller in very thin oxides. New gate dielectric materials with high permittivity have to be developed to enable design of nano-scale DGMOSFET.

Simulation characteristics of 600V 4H-SiC Normally-off JFET (600V급 4H-SiC Normally-off JFET의 Simulation 특성)

  • Kim, Sang-Cheol
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.138-139
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    • 2007
  • 탄화규소반도체소자는 wide band-gap 반도체 재료로 고전압, 고속스위칭 특성이 우수하여 차세대 전력반도체소자로 매우 유망한 소자이다. 이러한 물리적 특성으로 전력변환소자인 고전압 MOSFET 소자를 개발하기 위한 연구가 활발히 진행되고 있다. 그러나 MOS 소자에서 가장 중요한 게이트 산화막의 특성이 소자에 적용하기에는 그 특성이 많이 취약한 상태이다. 따라서 이러한 단점을 해결하여 고전압 전력변환소자로 적용하기 위하여 게이트 산화막이 필요없는 JFET 소자가 많이 연구되고 있다. 본 논문에서는 JFET 소자를 normally-off type으로 동작시키기 위하여 게이트의 구조, 도핑농도 및 게이트 폭을 조절하여 simulation를 수행하였다. 케이트의 농도 및 접합깊이에 따라 normally-on 또는 off 특성에 큰 영향을 미치고 있으며 게이트 트렌치구조의 깊이에 따라서도 영향을 받는다. 본 simulation 결과 최적의 트렌치 길이, 폭 및 농도로 소자를 구성하여 $1.3m{\Omega}cm^2$의 온-저항 특성을 얻을 수 있었다.

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Parameter dependent conduction path for nano structure double gate MOSFET (나노구조 이중게이트 MOSFET에서 전도중심의 파라미터 의존성)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.3
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    • pp.541-546
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    • 2008
  • In this paper, conduction phenomena have been considered for nano structure double gate MOSFET, using the analytical model. The Possion equation is used to analytical model. The conduction mechanisms to have an influence on current conduction are thermionic emission and tunneling current, and subthreshold swings of this paper are compared with those of two dimensional simulation to verify this model. The deviation of current path and the influence of current path on subthreshold swing have been considered according to the dimensional parameters of double gate MOSFET, i.e. gate length, gate oxide thickness, channel thickness. The optimum channel doping concentration is determined as the deviation of conduction path is considered according doping concentration.

Analyses for RF parameters of Tunneling FETs (터널링 전계효과 트랜지스터의 고주파 파라미터 추출과 분석)

  • Kang, In-Man
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.4
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    • pp.1-6
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    • 2012
  • This paper presents the extraction and analysis of small-signal parameters of tunneling field-effect transistors (TFETs) by using TCAD device simulation. The channel lengths ($L_G$) of the simulated devices varies from 50 nm to 100 nm. The parameter extraction for TFETs have been performed by quasi-static small-signal model of conventional MOSFETs. The small-signal parameters of TFETs with different channel lengths were extracted according to gate bias voltage. The $L_G$-dependency of the effective gate resistance, transconductance, source-drain conductance, and gate capacitance are different with those of conventional MOSFET. The $f_T$ of TFETs is inverely proportional not to $L_G{^2}$ but to $L_G$.

Investigation of Installation of Water Gate in Agricultural Reservoir (농업용저수지 여수로 게이트 설치현황 조사)

  • Lee, Kwang-Ya;Kim, Hae-Do;Chung, Kwang-Kun
    • Proceedings of the Korea Water Resources Association Conference
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    • 2007.05a
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    • pp.688-692
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    • 2007
  • 수리시설개보수사업을 통해 농업용저수지를 보강하는 방법은 여수로의 통수능력을 증대시키기 위해 물넘이 길이를 확장하는 방법과 예비방류가 가능하도록 부분게이트를 설치하여 홍수조절효과를 기대하는 일정량 방류방식을 혼합한 형태로 설계를 하고 있다. 이는 현실적으로 투자가 가능한 예산범위 안에서 최소한의 피해를 줄이기 위해 적절히 적용가능한 방법이다. 하지만 아직까지 게이트의 설치 위치나 형식에 관한 고찰이 없었으며 홍수배제능력검토 방법 또한 일관성 있게 이루어지고 있지 않다. 그리고 유지관리측면에서도 현재 많은 문제점이 나타나고 있다. 비상게이트 설치에 따라 홍수기시 하류지역의 침수피해가 발생하며 유지관리비용도 과거에 비해 상당히 늘어나고 있다. 하지만 최근 국내 기상여건하에서 저수지제체 안전도를 높이기 위해서는 농업용저수지에도 여수로 게이트가 반드시 필요한 실정이다. 농업용저수지의 설계홍수량 증가에 따라 홍수량 배제시설의 규모도 커져야 하나 지형적인 여건상 물넘이의 확장이 불가능한 지역도 많으며 물넘이 시설의 확장으로 인해 저수지 하류지역의 피해에 따른 민원도 제기됨에 따라 농업용저수지 여수로 게이트의 합리적이고 표준화된 모델이 제시되어야 할 것으로 판단된다.

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Parameter dependent conduction path for nano structure double gate MOSFET (나노구조 이중게이트 MOSFET에서 전도중심의 파라미터 의존성)

  • Jeong Hak-Gi;Lee Jae-Hyeong;Lee Jong-In
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2006.05a
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    • pp.861-864
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    • 2006
  • In this paper conduction phenomena have been considered for nano structure double gate MOSFET, using the analytical model. The Possion equation is used to obtain the analytical model. The conduction mechanisms to have an influence on current conduction are thermionic emission and tunneling current, and subthreshold swings of this paper is compared with those of two dimensional simulation to verify this model. The deviation of current path and the influence of current path on subthreshold swing have been considered according to the dimensional parameters of double gate MOSFET, i.e. gate length, gateoxide thickness, channel thickness. The optimum channel doping concentration is determined as the deviation of conduction path is considered according to channel doping concentration.

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Bias and Gate-Length Dependent Data Extraction of Substrate Circuit Parameters for Deep Submicron MOSFETs (Deep Submicron MOSFET 기판회로 파라미터의 바이어스 및 게이트 길이 종속 데이터 추출)

  • Lee Yongtaek;Choi Munsung;Ku Janam;Lee Seonghearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.12
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    • pp.27-34
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    • 2004
  • The study on the RF substrate circuit is necessary to model RF output characteristics of deep submicron MOSFETs below 0.2$\mum$ gate length that have bun commercialized by the recent development of Si submicron process. In this paper, direct extraction methods are developed to apply for a simple substrate resistance model as well as another substrate model with connecting resistance and capacitance in parallel. Using these extraction methods, better agreement with measured Y22-parameter up to 30 GHz is achieved for 0.15$\mum$ CMOS device by using the parallel RC substrate model rather than the simple resistance one, demonstrating the RF accuracy of the parallel model and extraction technique. Using this model, bias and gate length dependent curves of substrate parameters in the RF region are obtained by increasing drain voltage of 0 to 1.2V at deep submicron devices with various gate lengths of 0.11 to 0.5㎛ These new extraction data will greatly contribute to developing a scalable RF nonlinear substrate model.

Influence on Short Channel Effects by Tunneling for Nano structure Double Gate MOSFET (나노구조 이중게이트 MOSFET에서 터널링이 단채널효과에 미치는 영향)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.479-485
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    • 2006
  • The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.

Conduction Path Dependent Threshold Voltage for the Ratio of Top and Bottom Oxide Thickness of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 상하단 산화막 두께비에 따른 전도중심에 대한 문턱전압 의존성)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.11
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    • pp.2709-2714
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    • 2014
  • This paper has analyzed the change of threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness of asymmetric double gate MOSFET. The asymmetric double gate MOSFET has the advantage that the factor to be able to control the current in the subthreshold region increases. The analytical potential distribution is derived from Poisson's equation to analyze the threshold voltage and conduction path for the ratio of top and bottom gate oxide thickness. The Gaussian distribution function is used as charge distribution. This analytical potential distribution is used to derive off-current and subthreshold swing. By observing the results of threshold voltage and conduction path with parameters of bottom gate voltage, channel length and thickness, projected range and standard projected deviation, the threshold voltage greatly changed for the ratio of top and bottom gate oxide thickness. The threshold voltage changed for the ratio of channel length and thickness, not the absolute values of those, and it increased when conduction path moved toward top gate. The threshold voltage and conduction path changed more greatly for projected range than standard projected deviation.

Studies on the Fabrication and Characteristics of PHEMT for mm-wave (mm-wave용 전력 PHEMT제작 및 특성 연구)

  • Lee, Seong-Dae;Chae, Yeon-Sik;Yun, Gwan-Gi;Lee, Eung-Ho;Lee, Jin-Gu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.6
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    • pp.383-389
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    • 2001
  • We report on the design, fabrication, and characterization of 0.35${\mu}{\textrm}{m}$-gate AIGaAs/InGaAs PHEMTs for millimeter-wane applications. The epi-wafer structures were designed using ATLAS for optimum DC and AC characteristics, 0.351m-gate AIGaAs/rnGaAs PHEMTs having different gate widths and number of fingers were fabricated using electron beam lithography Dependence of RF characteristics of PHEMT on gate finger with and number of gate fingers have been investigated. PHEMT haying two 0.35$\times$60${\mu}{\textrm}{m}$$^2$ gate fingers showed the knee voltage, pinch-off voltage, drain saturation current density, and maximum transconductance of 1.2V, -1.5V, 275㎃/mm, and 260.17㎳/mm, respectively. The PHEMT showed fT(equation omitted)(current gain cut-off frequency) of 45㎓ and fmax(maximum oscillation frequency) of 100㎓. S$_{21}$ and MAG of the PHEMT were 3.6dB and 11.15dB, respectively, at 35㎓

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