• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.305-306
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• 2016

본 논문은 선택적 전압 균일화 기법을 이용하여 직렬 연결된 리튬 이온 배터리의 빠른 전압 균일화를 위한 새로운 능동형 셀 밸런싱 회로를 제안하였다. 제안한 회로는 다권선 변압기를 사용한 전하 균일화 회로에 인덕터 1개, MOSFET 스위치 1개를 추가한 회로 구성을 가지며, 기존의 빠른 밸런싱을 위한 회로 대비 수 배 적은 소자로 구성이 가능하다. 추가된 인덕터는 직렬 연결된 배터리 전압을 통해 빠르게 저장된 에너지를, 낮은 전압의 배터리로 높은 밸런싱 전류를 전달함으로써 배터리 셀 간의 빠른 전압 밸런싱을 구현하였다. 제안한 회로의 밸런싱 속도에 대한 검증을 위해서, PSIM Simulation을 통해 기존 회로와 비교 검증 하였다.

• Proceedings of the KIEE Conference
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• 2003.10a
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• pp.174-177
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• 2003

본 논문에서는 AC PDP의 유지방전구간에서의 인가전압에 따른 방전전류, 공간전압, 벽전하 등의 변화를 새로운 AC PDP를 위한 등가회로모델을 사용하여 효율적이고 간편하게 시뮬레이션 한 결과를 소개한다. 벽전하의 정확한 분석은 안정적이고 효율적인 AC PDP의 구동 방법을 개발하기 위해 계속 연구, 보고 되어 왔지만, 인가되는 전압의 변화에 따른 시간적인 셀 내부의 변화를 빠르고 편리하게 분석하고 이해하는데 효과적인 방법은 제시되지 못하였다. 본 논문에서는 AC PDP의 전극간 물리적인 특성을 고려하여 3개의 직렬 커패시터와 1개의 병렬 커패시터, 2개의 싸이리스터를 사용하여 AC PDP를 위한 등가회로모델을 구성하여 제시하였다. 제안된 등가회로모델은 SPICE와 같은 표준 회로시뮬레이션 툴에 손쉽게 적용가능하며, 이러한 방법으로 분석된 패널내의 전류, 공간전압, 벽전하의 동특성을 소개하였다. 등가회로모델을 이용한 시뮬레이션 결과는 실험을 통한 측정 결과와 비교하여 그 정확성을 검증하였다. 인가전압의 시간적 변화의 따른 유입전류 및 셀 내의 전압 및 전하의 분포를 손쉽고 정확하게 시뮬레이션 할 수 있는 본 AC PDP의 등가회로모델은 AC PDP의 특성을 이해하는 데에 중요한 도구가 될 것이며 효율적인 구동 방식의 개발 및 분석 등에 널리 활용될 수 있을 것이다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.89-96
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• 2004

High-linearity voltage-controlled current sources (VCCSs) circuits for wide voltage-controlled oscillator and automatic gain control are proposed. The VCCS consists of emitter follower for voltage input, two common-base amplifier which their emitter connected for current output, and current mirror which connected the two amplifier for large output current. The VCCS used only five transistors and a resistor without an extra bias circuit. Simulation results show that the VCCS has current output range from 0㎃ to 300㎃ over the control voltage range from 1V to 4.8V at supply voltage 5V. The linearity error of output current has less than 1.4% over the current range from 0A to 300㎃.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.11
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• pp.2014-2019
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• 2006

PDP driving circuit requires switching devices and capacitors to stand up high voltages over 160V. This is the main cause that the power consumption and the cost of a PDP driving circuit increase. Conventional PDP driving circuits consist of 3 voltage sources and 16 switching devices. In this paper, we propose a PDP driving circuit using 2 voltage sources and 12 switching devices that can be operated with a lower supply voltage than conventional driving circuit. The operation of the proposed driving circuit is verified by the computer simulation. Simulation results show that the output signal can drive PDP cell when the supply voltage is higher than 45V in the input frequency range 70kHz to 100kHz.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.451-452
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• 2013

제안된 토폴로지의 특징은 각 모듈에 연결된 모든 DC/DC컨버터 출력이 변압기 1개에 연결하는 구조를 취하고 있다. 이러한 구조는 배터리의 전압 밸런싱용 모든 컨버터가 하나의 고조파 변압기를 통하여 자속을 공유하는 형태를 취함으로 모든 컨버터의 입력 전압이 자동으로 같아지는 전압으로 수렴하게 된다. 특히 본 구조는 직렬로 연결된 여러 개의 배터리 전압을 한 개의 전압검출만으로 추적이 가능하여 BMS 관리를 위한 다수의 전압센서를 제거할 수 있는 특징을 갖고 있다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.5
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• pp.1172-1177
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• 2008

To compensate voltage error of the channel selecting filter, a current comparison type voltage tuning circuit is designed. Because the proposed current comparison type voltage tuning circuit is not need to attach another subcircuit, the chip size can be reduced, therefore the proposed circuit is very useful in the low voltage and low power channel filter. We used three channels including bluetooth communication system as application circuits of the proposed tuning circuit. As the results of HSPICE simulation using $0.18{\mu}m$ CMOS technology verify that the proposed tuning circuit respectively can be operated in $12{\mu}s$, $13{\mu}s$ and $15{\mu}s$ in three channel.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.59-65
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• 1998

In this paper, a novel rail-to-rail input stage circuit with improved transconductance Is designed. Its excellent performances over whole common-mode input voltage Vcm range is demonstrated by circuit simulator HSPICE. The novel input stage circuit comprises additional 4 input transistors and 4 current sources/sinks. It maintains DC currents of signal amplifying transistors when one of the differential input stage circuits operates, but it reduces these currents to 1/4 when both differential input stage circuits operates, As a result, a operational amplifier with the novel circuit maintains nearly constant transconductance performance and unity-gain frequency in strong inversion region. The novel circuit allows an optimal frequency compensation and uniform operational amplifier performance over whole Vcm range.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.11
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• pp.41-47
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• 2011

A novel digital instrumentation amplifier(DIA) converting universal signal inputs into 5V voltage-output for industry standard sensor signal processing was designed. The circuit consists of a commercial instrumentation amplifier, seven analog switches, two voltage references of 1.0V and -10.0V, and four resistors. The converting principle is the circuit reconstruction by switches for resistor values and reference voltages according to input signals. The simulation result shows that the DIA has a good output voltage characteristics of 0~5V for the input voltage of 0V~5V, 1V~5V, -10V~+10V, and 4mA~20mA. The nonlinearity error was less than 0.1% for the four type signal inputs.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.3
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• pp.279-284
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• 2014

This paper proposes a novel OLED pixel circuit to compensate the threshold voltage variation of p-channel low temperature polycrystalline silicon thin-film transistors (LTPS TFTs). The proposed 5-TFT OLED pixel circuit consists of 4 switching TFTs, 1 OLED driving TFT and 1 capacitor. One frame of the proposed pixel circuit is divided into initialization period, threshold voltage sensing and data programming period, data holding period and emission period. SmartSpice simulation results show that the maximum error rate of OLED current is -4.06% when the threshold voltage of driving TFT varies by ${\pm}0.25V$ and that of OLED current is 9.74% when the threshold voltage of driving TFT varies by ${\pm}0.50V$. Thus, the proposed 5T1C pixel circuit can realize uniform OLED current with high immunity to the threshold voltage variation of p-channel poly-Si TFT.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.4 s.310
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• pp.53-59
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• 2006

This paper describes the new design technique of full wave rectifier (FWR) for precise measurement instrument and the chip implementation of this FWR circuit with measurement results. Conventional circuits have some problems of complex design and limited output range( $VDD/2{\sim}VLIIV1IT+$). Proposed FWR circuit was simply designed with two 2x1 MUXs, one high speed comparator, and one differential difference amplifier(DDA). One rail-to-rail differential difference amplifier(DDA) performs the DC level shifting to VSS and 2X amplification simultaneously, and enables the full range ($Vss{\sim}VDD$) operation. The proposed FWR circuits shows more than 50% reduction of chip area and power consumption compared to conventional one. Proposed circuit was implemented with 0.35um 1-poly 2-metal CMOS process. Core size is $150um{\times}450um$ and power dissipation is 840uW with 3.3V single supply.