• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.4
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• pp.1-6
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• 2000

Recently, SrBi$_{2}$Ta$_{2}$ $O_{9}$(SBT) and Pb(Zr,Ti) $O_{3}$(PZT) were much attracted as materials of capacitor for ferroelectric random access memory(FRAM) with higher read/ write speed, lower power consumption and nonvolartility. SBT thin film has appeared as the most prominent fatigue free and low operation voltage. To highly integrate FRAM, SBT thin film has to be etched. A lot of papers have been reported over growth of SBT thin film and its characteristics. However, there are few reports about etching SBT thin film owing to difficult of etching ferroelectric materials. SBT thin film was etched in CF$_{4}$Ar plasma using magnetically enhanced inductively coupled plasma (MEICP) system. In order to investigate the chemical reaction on the etched surface of SBT thin films, X-ray Photoelecton spectrosocpy (XPS) and Secondary ion mass spectroscopy(SIMS) was performed.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.11-16
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• 2002

In this study, the dry etching characteristics of $SrBi_2Ta_2O_9$ (SBT) thin films were investigated by using ICP-RIE (inductively coupled plasma-reactive ion etching). The etching damage and degradation were analyzed with XPS (X-ray photoelectron spectroscopy) and C-V (Capacitance-Voltage) measurement. The etching rate increased with increasing the ICP power and the capacitively coupled plasma (CCP) power. The etch rate of 900$\AA$/min was obtained with 700 W of ICP power and 200 W of CCP power. The main problem of dry etching is the degradation of the ferroelectric material. The damage-free etching characteristics were obtained with the $Ar/C1_2/CHF_3$ gas mixture of 20/14/2 when the ICP power and CCP power were biased at 700 W and 200 W, respectively. The experimental results show that the dry etching process with ICP-RIE is applicable to the fabrication of the single transistor type ferroelectric memory device.

• Electrical & Electronic Materials
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• v.10 no.10
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• pp.1029-1033
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• 1997

A prototype MFSFET using ferroelectric fluoride BaMgF$_4$as a gate insulator has been successfully fabricated with the help of 2 sheets of metal mask. The fluoride film was deposited in an ultrai-high vacuum system at a substrate temperature of below 30$0^{\circ}C$ and an in-situ post-deposition annealing was conducted for 20 seconds at $650^{\circ}C$ in the same chamber. The interface state density of the BaMgF$_4$/Si(100) interface calculated by a MFS capacitor fabricated on the same wafer was about 8$\times$10$^{10}$ /cm$^2$.eV. The I$_{D}$-V$_{G}$ characteristics of the MFSFET show a hysteresis loop due to the ferroelectric nature of the BaMgF$_4$film. It is also demonstrated that the I$_{D}$ can be controlled by the “write” plus which was applied before the measurements even at the same “read”gate voltage.ltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05b
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• pp.107-110
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• 2002

The optical memory devices of BST thin films to composite $(Ba_{0.7}\;Sr_{0.3})TiO_{3}$ using sol-gel method were fabricated by changing of the depositing layer number on $Pt/Ti/SiO_{2}/Si$ substrate. The structural properties of optical memory devices to be ferroelectric was investigated by fractal analysis and 3-dimension image processing. The thickness of BST thin films at each coating numbers 3, 4 and 5 times was $2500[\AA]$, $3500[\AA]$ and $3800[\AA]$. BST thin films exhibited the most pronounced grain growth. The surface morphology image was roughness with coating numbers. The thin films increasing with coating numbers shows a more textured and complex configuration.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.125-125
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• 2009

유기물 강유전체 재료를 이용한 비휘발성 메모리에 대한 연구가 활발하게 진행되고 있다. 현재까지 알려진 대표적인 재료는 P(VDF-TrFE)이다. P(VDF-TrFE)는 결정화 온도가 낮기 때문에 저온공정이 가능하여 향 후 플렉서블 소자 응용에도 유망하다. 최근의 연구결과에서는 고유전율의 절연층을 삽입함으로써 누설전류를 감소시켜, 저전압에서 우수한 강유전성이 얻어질이 보고되고 있다. 본 논문에서는 P(VDF-TrFE)의 조성 변화를 통하여 최적의 강유전성이 얻어지는 조건을 찾고자 노력하였으며, 조성 변화에 따른 구조적, 전기적 특성에 대하여 보고한다.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.55-58
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• 2000

This paper describes a single transistor type ferroelectric field effect transistor (1T FeFET) memory celt scheme which can select one unit memory cell and program/read it. To solve the selection problem of 1T FeEET memory cell array, the row direction common well is electrically isolated from different adjacent row direction column. So, we can control voltage of common well line. By applying bias voltage to Gate and Well, respectively, we can implant IT FeEET memory cell scheme which no interface problem and can bit operation. The results of HSPICE simulations showed the successful operations of the proposed cell scheme.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.39-40
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• 2005

Ferroelectric Eu-substituted $Bi_4Ti_3O_{12}$ (BET) thin films with a thickness of 200 nm were deposited on Pt(111)/Ti/SiO$_2$/Si(100) substrate by means of the liquid delivery MOCVD system and annealed at several temperatures in an oxygen atmosphere. At annealing temperature above $600^{\circ}C$, the microstructure of layered perovskite phase was observed. The remanent polarization of these films increased with increase in annealing temperature. The remanent polarization values ($2P_r$) of the BET thin films annealed at $720^{\circ}C$ were $37.71{\mu}C/cm^2$ at an applied voltage of 5 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.509-512
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• 1999

Ferroelectric Sr$_2$(Nb, Ta)$_2$O$_{7}$(SNTO), La$_2$Ti$_2$O$_{7}$(LTO) thin films were prepared by sol-gel processes. SNTO, LTO thin films were spin-coated on Pt/TiO$_2$/SiO$_2$/Si(100). Pt/Ti/SiO$_2$/Si(100). PT/ZrO$_2$/SiO$_2$/Si(100) substrates. After multiple coating, dried thin films were heat-treated for decomposition of residual organics and crystallization. Dielectric and other relevant electrical properties were measured and the results showed a little possibility in ferroelectric gate random access memory devices.ces.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.938-941
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• 2000

SrBi$_2$Ta$_2$$O_{9}$(SBT) thin films were etched in Ar/SF$_{6}$ and Ar/CHF$_3$gas plasma using magnetically enhanced inductively coupled plasma(MEICP) system. The etch rates of SBT thin film were 1500$\AA$/min in SF$_{6}$/Ar and 1650 $\AA$/min in Ar/CHF$_3$at a rf power of 600W a dc-bias voltage of -l50V. a chamber pressure of 10 mTorr. In order to examine the chemical reactions on the etched SBT thin film surface , x-ray photoelectron spectroscopy (XPS) and secondary ion mass spectrometry (SIMS) were examined. In etching SBT thin film with F-base gas plasma, M(Sr. Bi. Ta)-O bonds are broken by Ar ion bombardment and form SrFand TaF$_2$ by chemical reaction with F. SrF and TaF$_2$are removed more easily by Ar ion bombardmentrdment

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.11
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• pp.765-770
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• 2001

Metal-ferroelectric-insulator- semiconductor(MFTS) devices by using rapid thermal annealed (RTA) LiNbO$_3$/AIN/Si(100) structures were successfully fabricated and demonstrated nonvolatile memory operations. Metal-insulator-semiconductor(MIS) C-V properties with high dielectric AIN thin films showed no hysteresis and good interface properties. The dielectric constant of the AIN film calculated from the capacitance at the accumulation region in the capacitance-voltage(C-V) characteristics was about 8. The C-V characteristics of MFIS capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 23. The memory window width was about 1.2 V at the gate voltage of $\pm$5 V ranges. Typical gate leakage current density of the MFIS structure was the order of 10$^{-9}$ A/$\textrm{cm}^2$ at the range of within $\pm$500 kV/cm. The ferroelectric capacitors showed no polarization degradation up to about 10$^{11}$ switching cycles when subjected to symmetric bipolar voltage pulse(peak-to-peak 8 V, 50 % duty cycle) in the 500 kHz.