• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2000.11a
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• pp.3-4
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• 2000

Many researchers are interested in the synthesis and characterization of carbon nitride and diamond-like carbon (DLq because they show excellent mechanical properties such as low friction and high wear resistance and excellent electrical properties such as controllable electical resistivity and good field electron emission. We have deposited amorphous carbon nitride (a-C:N) thin films and DLC thin films by shielded arc ion plating (SAIP) and evaluated the structural and tribological properties. The application of appropriate negative bias on substrates is effective to increase the film hardness and wear resistance. This paper reports on the deposition and tribological OLC films in relation to the substrate bias voltage (Vs). films are compared with those of the OLC films. A high purity sintered graphite target was mounted on a cathode as a carbon source. Nitrogen or argon was introduced into a deposition chamber through each mass flow controller. After the initiation of an arc plasma at 60 A and 1 Pa, the target surface was heated and evaporated by the plasma. Carbon atoms and clusters evaporated from the target were ionized partially and reacted with activated nitrogen species, and a carbon nitride film was deposited onto a Si (100) substrate when we used nitrogen as a reactant gas. The surface of the growing film also reacted with activated nitrogen species. Carbon macropartic1es (0.1 -100 maicro-m) evaporated from the target at the same time were not ionized and did not react fully with nitrogen species. These macroparticles interfered with the formation of the carbon nitride film. Therefore we set a shielding plate made of stainless steel between the target and the substrate to trap the macropartic1es. This shielding method is very effective to prepare smooth a-CN films. We, therefore, call this method "shielded arc ion plating (SAIP)". For the deposition of DLC films we used argon instead of nitrogen. Films of about 150 nm in thickness were deposited onto Si substrates. Their structures, chemical compositions and chemical bonding states were analyzed by using X-ray diffraction, Raman spectroscopy, X-ray photoelectron spectroscopy and infrared spectroscopy. Hardness of the films was measured with a nanointender interfaced with an atomic force microscope (AFM). A Berkovich-type diamond tip whose radius was less than 100 nm was used for the measurement. A force-displacement curve of each film was measured at a peak load force of 250 maicro-N. Load, hold and unload times for each indentation were 2.5, 0 and 2.5 s, respectively. Hardness of each film was determined from five force-displacement curves. Wear resistance of the films was analyzed as follows. First, each film surface was scanned with the diamond tip at a constant load force of 20 maicro-N. The tip scanning was repeated 30 times in a 1 urn-square region with 512 lines at a scanning rate of 2 um/ s. After this tip-scanning, the film surface was observed in the AFM mode at a constant force of 5 maicro-N with the same Berkovich-type tip. The hardness of a-CN films was less dependent on Vs. The hardness of the film deposited at Vs=O V in a nitrogen plasma was about 10 GPa and almost similar to that of Si. It slightly increased to 12 - 15 GPa when a bias voltage of -100 - -500 V was applied to the substrate with showing its maximum at Vs=-300 V. The film deposited at Vs=O V was least wear resistant which was consistent with its lowest hardness. The biased films became more wear resistant. Particularly the film deposited at Vs=-300 V showed remarkable wear resistance. Its wear depth was too shallow to be measured with AFM. On the other hand, the DLC film, deposited at Vs=-l00 V in an argon plasma, whose hardness was 35 GPa was obviously worn under the same wear test conditions. The a-C:N films show higher wear resistance than DLC films and are useful for wear resistant coatings on various mechanical and electronic parts.nic parts.

• Korean Journal of Materials Research
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• v.17 no.2
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• pp.96-99
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• 2007

The effects of post-annealing of high-k $HfO_2$ thin films grown by atomic layer deposition method were investigated by the annealing treatments of $400-600^{\circ}C$. $Pt/HfO_2/p-Si\;MOS$ capacitor structures were fabricated, and then the capacitance-voltage and current-voltage characteristics were measured to analyze the electrical characteristics of dielectric layers. The X-ray diffraction analyses revealed that the $500^{\circ}C-annealed\;HfO_2$ film remained to be amorphous, and the $600^{\circ}C-annealed\;HfO_2$ film was crystallized. The annealing treatment at $500^{\circ}C$ resulted in the highest capacitance and the lowest leakage current due to the reduction of defects in the $HfO_2$ films and non-crystallization. Our results suggest that post-annealing treatments are a critical factor in improving the characteristics of gate dielectric layer.

• Journal of the Korean Magnetics Society
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• v.11 no.4
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• pp.168-172
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• 2001

Co-Zn ferrite thin films grown on thermally oxidized silicon wafers were fabricated by a sol-gel method. Magnetic and structural properties of Co-Zn thin films were investigated by using x-ray diffractometer (XRD), atomic force microscopy (AFM), auger electron spectroscopy (AES) and a vibrating sample magnetometer (VSM). Co-Zn ferrite thin films annealed at 400 $^{\circ}C$ presented have only a single phase spinel structure without any preferred crystallite orientation. Their surface roughness of Co-Zn ferrite thin films was shown as less than 3 nm and the grain size was about 40 nm for annealing temperatures over 600 $^{\circ}C$. A moderate saturation magnetization of Co-Zn ferrite thin films for recording media was obtained in this study and there is no significant difference of their magnetic property with those external fields of parallel and perpendicular to planes of the films. The maximum value of the coercivity was obtained as 1,900 Oe for Co-Zn ferrite thin film annealed at 600 $^{\circ}C$.

• Korean Journal of Metals and Materials
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• v.47 no.5
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• pp.322-329
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• 2009

60 nm- and 20 nm-thick hydrogenated amorphous silicon (a-Si:H) layers were deposited on 200 nm $SiO_2/Si$ substrates using ICP-CVD (inductively coupled plasma chemical vapor deposition). A 10 nm-Ni layer was then deposited by e-beam evaporation. Finally, 10 nm-Ni/60 nm a-Si:H/200 nm-$SiO_2/Si$ and 10 nm-Ni/20 nm a-Si:H/200 nm-$SiO_2/Si$ structures were prepared. The samples were annealed by rapid thermal annealing for 40 seconds at $200{\sim}500^{\circ}C$ to produce $NiSi_x$. The resulting changes in sheet resistance, microstructure, phase, chemical composition and surface roughness were examined. The nickel silicide on a 60 nm a-Si:H substrate showed a low sheet resistance at T (temperatures) >$450^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate showed a low sheet resistance at T > $300^{\circ}C$. HRXRD analysis revealed a phase transformation of the nickel silicide on a 60 nm a-Si:H substrate (${\delta}-Ni_2Si{\rightarrow}{\zeta}-Ni_2Si{\rightarrow}(NiSi+{\zeta}-Ni_2Si)$) at annealing temperatures of $300^{\circ}C{\rightarrow}400^{\circ}C{\rightarrow}500^{\circ}C$. The nickel silicide on the 20 nm a-Si:H substrate had a composition of ${\delta}-Ni_2Si$ with no secondary phases. Through FE-SEM and TEM analysis, the nickel silicide layer on the 60 nm a-Si:H substrate showed a 60 nm-thick silicide layer with a columnar shape, which contained both residual a-Si:H and $Ni_2Si$ layers, regardless of annealing temperatures. The nickel silicide on the 20 nm a-Si:H substrate had a uniform thickness of 40 nm with a columnar shape and no residual silicon. SPM analysis shows that the surface roughness was < 1.8 nm regardless of the a-Si:H-thickness. It was confirmed that the low temperature silicide process using a 20 nm a-Si:H substrate is more suitable for thin film transistor (TFT) active layer applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11b
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• pp.209-212
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• 2001

Polyimide(PI) films have been considered as the interlayer dielectric materials due to low dielectric constant, low water absorption, high gap-fill and planarization capability. The PI mm Was etched with using inductively coupled plasma (ICP). The etching characteristics such as etch rate and selectivity were evaluated to gas mixing ratio. High etch rate was $8300{\AA}/min$ and vertical profile was approximately acquired $90^{\circ}$ at $CF_{4}/(CF_{4}+O_{2})$ of 0.2. The selectivies of polyimide to PR and $SiO_{2}$ were 1.2, 5.9, respectively. The etching profiles of PI films with an aluminum pattern were measured by a scanning electron microscope (SEM). The chemical states on the PI film surface were investigated by x-ray photoelectron spectroscopy (XPS). Radical densities of oxygen and fluorine in different gas mixing ratio of $O_{2}/CF_{4}$ were investigated by optical emission spectrometer (OES).

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2003.05a
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• pp.41-41
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• 2003

텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

• Korean Journal of Metals and Materials
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• v.46 no.11
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• pp.762-769
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• 2008

Hydrogenated amorphous silicon(a-Si : H) layers, 120 nm and 50 nm in thickness, were deposited on 200 $nm-SiO_2$/single-Si substrates by inductively coupled plasma chemical vapor deposition(ICP-CVD). Subsequently, 30 nm-Ni layers were deposited by E-beam evaporation. Finally, 30 nm-Ni/120 nm a-Si : H/200 $nm-SiO_2$/single-Si and 30 nm-Ni/50 nm a-Si:H/200 $nm-SiO_2$/single-Si were prepared. The prepared samples were annealed by rapid thermal annealing(RTA) from $200^{\circ}C$ to $500^{\circ}C$ in $50^{\circ}C$ increments for 30 minute. A four-point tester, high resolution X-ray diffraction(HRXRD), field emission scanning electron microscopy (FE-SEM), transmission electron microscopy (TEM), and scanning probe microscopy(SPM) were used to examine the sheet resistance, phase transformation, in-plane microstructure, cross-sectional microstructure, and surface roughness, respectively. The nickel silicide on the 120 nm a-Si:H substrate showed high sheet resistance($470{\Omega}/{\Box}$) at T(temperature) < $450^{\circ}C$ and low sheet resistance ($70{\Omega}/{\Box}$) at T > $450^{\circ}C$. The high and low resistive regions contained ${\zeta}-Ni_2Si$ and NiSi, respectively. In case of microstructure showed mixed phase of nickel silicide and a-Si:H on the residual a-Si:H layer at T < $450^{\circ}C$ but no mixed phase and a residual a-Si:H layer at T > $450^{\circ}C$. The surface roughness matched the phase transformation according to the silicidation temperature. The nickel silicide on the 50 nm a-Si:H substrate had high sheet resistance(${\sim}1k{\Omega}/{\Box}$) at T < $400^{\circ}C$ and low sheet resistance ($100{\Omega}/{\Box}$) at T > $400^{\circ}C$. This was attributed to the formation of ${\delta}-Ni_2Si$ at T > $400^{\circ}C$ regardless of the siliciation temperature. An examination of the microstructure showed a region of nickel silicide at T < $400^{\circ}C$ that consisted of a mixed phase of nickel silicide and a-Si:H without a residual a-Si:H layer. The region at T > $400^{\circ}C$ showed crystalline nickel silicide without a mixed phase. The surface roughness remained constant regardless of the silicidation temperature. Our results suggest that a 50 nm a-Si:H nickel silicide layer is advantageous of the active layer of a thin film transistor(TFT) when applying a nano-thick layer with a constant sheet resistance, surface roughness, and ${\delta}-Ni_2Si$ temperatures > $400^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.11-11
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• 2008

ZnO has a very large exciton binding energy (60 meV) as well as thermal and chemical stability, which are expected to allow efficient excitonic emission, even at room temperature. ZnO based electronic devices have attracted increasing interest as the backplanes for applications in the next-generation displays, such as active-matrix liquid crystal displays (AMLCDs) and active-matrix organic light emitting diodes (AMOLEDs), and in solid state lighting systems as a substitution for GaN based light emitting diodes (LEDs). Most of these electronic devices employ the electrical behavior of n-type semiconducting active oxides due to the difficulty in obtaining a p-type film with long-term stability and high performance. p-type ZnO films can be produced by substituting group V elements (N, P, and As) for the O sites or group I elements (Li, Na, and K) for Zn sites. However, the achievement of p-type ZnO is a difficult task due to self-compensation induced from intrinsic donor defects, such as O vacancies (Vo) and Zn interstitials ($Zn_i$), or an unintentional extrinsic donor such as H. Phosphorus (P) doped ZnO thin films were grown on c-sapphire substrates by radio frequency magnetron sputtering with various Ar/ $O_2$ gas ratios. Control of the electrical types in the P-doped ZnO films was achieved by varying the gas ratio with out post-annealing. The P-doped ZnO films grown at a Ar/ $O_2$ ratio of 3/1 showed p-type conductivity with a hole concentration and hole mobility of $10^{-17}cm^{-3}$ and $2.5cm^2/V{\cdot}s$, respectively. X-ray diffraction showed that the ZnO (0002) peak shifted to lower angle due to the positioning of $p^{3-}$ ions with a smaller ionic radius in the $O^{2-}$ sites. This indicates that a p-type mechanism was due to the substitutional Po. The low-temperature photoluminescence of the p-type ZnO films showed p-type related neutral acceptor-bound exciton emission. The p-ZnO/n-Si heterojunction LEO showed typical rectification behavior, which confirmed the p-type characteristics of the ZnO films in the as-deposited status, despite the deep-level related electroluminescence emission.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.11
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• pp.816-820
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• 2013

We investigated the characteristics of the silicon oxy-nitride and nitride films grown by plasma-enhanced chemical vapor deposition (PECVD) at the low temperature with a varying $NH_3/N_2O$ mixing ratio and a fixed $SiH_4$ flow rate. The deposition temperature was held at $150^{\circ}C$ which was the temperature compatible with the plastic substrate. The composition and bonding structure of the nitride films were investigated using Fourier transform infrared spectroscopy (FTIR) and X-ray photoelectron spectroscopy (XPS). Nitrogen richness was confirmed with increasing optical band gap and increasing dielectric constant with the higher $NH_3$ fraction. The leakage current density of the nitride films with a high NH3 fraction decreased from $8{\times}10^{-9}$ to $9{\times}10^{-11}(A/cm^2$ at 1.5 MV/cm). This results showed that the films had improved electrical properties and could be acceptable as a gate insulator for thin film transistors by deposited with variable $NH_3/N_2O$ mixing ratio.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1438-1439
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• 2006

$Ge_{2}Sb_{2}Te_5$(GST) thin film at present is a promising candidate for a phase change random access memory (PCRAM) based on the difference in resistivity between the crystalline and amorphous phase. PCRAM is an easy to manufacture, low cost storage technology with a high storage density. Therefore today several major chip in manufacturers are investigating this data storage technique. Recently, A. Pirovano et al. showed that PCRAM can be safely scaled down to the 65 nm technology node. G. T Jeonget al. suggested that physical limit of PRAM scaling will be around 10 nm node. Etching process of GST thin ra films below 100 nm range becomes more challenging. However, not much information is available in this area. In this work, we report on a parametric study of ICP etching of GST thin films in $Cl_2$/Ar chemistry. The etching characteristics of $Ge_{2}Sb_{2}Te_5$ thin films were investigated using an inductively coupled plasma (ICP) of $Cl_2$/Ar gas mixture. The etch rate of the GST films increased with increasing $Cl_2$ flow rate, source and bias powers, and pressure. The selectivity of GST over the $SiO_2$ films was higher than 10:1. X-ray photoelectron spectroscopy(XPS) was performed to examine the chemical species present in the etched surface of GST thin films. XPS results showed that the etch rate-determining element among the Ge, Sb, and Te was Te in the $Cl_2$/Ar plasma.