• Title/Summary/Keyword: $SiO_2/Si$ interface

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Laser CVD SiON-Si interface investigation by DLTS (DLTS 법(法)에 의한 Laser CVD SiON 막(膜)-Si 계(系)의 계면(界面) 특성(特性))

  • Chun, Young-Il;Kim, Sang-Wook;Yi, Seung-Hwan;Park, Ji-Soon;Park, Geun-Young;Sung, Yung-Kwon
    • Proceedings of the KIEE Conference
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    • 1991.11a
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    • pp.237-240
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    • 1991
  • In this paper, silicon oxynitride(SiON) films were chemically deposited by 193 nm Excimer laser irradiated parallel to the substrate. the laser pulse energy was 80 mJ, repetetion rate was 80 Hz and the laser average power was 6.4 watt, the gas ratio of $N_2O/NH_3$ was 0.75, the substrate temperature was $300^{\circ}C$, and the chamber pressure was 2 torr. And then, the interface state density($N_{ss}$) was characterized by DLTS(Deep Level Transient Spectroscopy). In addition, the capture cross section($\sigma$) and activation energy(${\Delta}E$) was also obtained. The resulting Nss values were $5.5{\times}10^{10}-3.2{\times}10^{11}(eV^{-1}cm^{-2})$, $\sigma$ was $6.64{\times}10^{-20}-2.114{\times}10^{-17}(cm^2)$, the ${\Delta}E$ of two peaks were $8.93{\times}10^{-2}$(eV), 0.375(eV).

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Temperature dependence of Heteroeptaxial $Y_2O_3$ films grown on Si by ionized cluster beam deposition

  • Cho, M.-H.;Ko, D.-H.;Whangbo, S.W.;Kim, H.B.;Jeong, K.H.;Whang, C.N.;Choi, S.C.;Cho, S.J.
    • Journal of the Korean Vacuum Society
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    • v.7 no.s1
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    • pp.57-77
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    • 1998
  • Heteroepitaxial $Y_2O_3$ films were grown on a Si(111) substrate by ionized cluster beam deposition(ICBD) in ultra high vacuum, and its qualities such as crystllitnity, film stress, and morphological characteristics were investigated using the various measurement methods. The crystallinity was investigated by x-ray diffraction (XRD) and reflection high energy electron diffraction (RHEED). Interface crystallinity was also examined by Rutherford backscattering spectroscopy(RBS) channeling, transmission electron microscopy(TEM). The stress of the films was measured by RBS channeling and XRD. Surface and interface morphological characteristics were investigated by atomic force microscopy (AFM) and x-ray scattering method. Comparing the interface with the surface characteristics, we can conclude that many defects at the interface region were generated by interface reaction between the yttrium metal and SiO2 layer and by ion beam characteristic such as shallow implantation, so that they influenced the film qualities. The film quality was dominantly depended on the characteristic temperature range. In the temperature range from $500^{\circ}C$ to $600^{\circ}C$, the crystallinity was mainly improved and the surface roughness was drastically decreased. On the other hand, in the temperature range from $600^{\circ}C$ to $700^{\circ}C$, the compressive stress and film density were dominantly increased, and the island size was more decreased. Also the surface morphological shape was transformed from elliptical shape to triangular. The film stress existed dominantly at the interface region due to the defects generation.

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High Work Function of AZO Fhin Films as Insertion Layer between TCO and p-layer and Its Application of Solar Cells

  • Kang, Junyoung;Park, Hyeongsik;Yi, Junsin
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.426.1-426.1
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    • 2016
  • We report high work function Aluminum doped zinc oxide (AZO) films as insertion layer as a function of O2 flow rate between transparent conducting oxides (TCO) and hydrogenated amorphous silicon oxide (a-SiOx:H) layer to improve open circuit voltage (Voc) and fill factor (FF) for high efficiency thin film solar cell. However, amorphous silicon (a-Si:H) solar cells exhibit poor fill factors due to a Schottky barrier like impedance at the interface between a-SiOx:H windows and TCO. The impedance is caused by an increasing mismatch between the work function of TCO and that of p-type a-SiOx:H. In this study, we report on the silicon thin film solar cell by using as insertion layer of O2 reactive AZO films between TCO and p-type a-SiOx:H. Significant efficiency enhancement was demonstrated by using high work-function layers (4.95 eV at O2=2 sccm) for engineering the work function at the key interfaces to raise FF as well as Voc. Therefore, we can be obtained the conversion efficiency of 7 % at 13mA/cm2 of the current density (Jsc) and 63.35 % of FF.

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Plasmonic Nanosheet towards Biosensing Applications

  • Tamada, Kaoru
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.105-106
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    • 2013
  • Surface plasmon resonance (SPR) is classified into the propagating surface plasmon (PSP) excited on flat metal surfaces and the local surface plasmon (LSP) excited by metalnanoparticles. It is known that fluorescence signals are enhanced by these two SPR-fields.On the other hand, fluorescence is quenched by the energy transfer to metal (FRET). Bothphenomena are controlled by the distance between dyes and metals, and the degree offluorescence enhancement is determined by the correlation. In this study, we determined thecondition to achieve the maximum fluorescence enhancement by adjusting the distance of ametal nanoparticle 2D sheet and a quantum dots 2D sheet by the use of $SiO_2$ spacer layers. The 2D sheets consisting of myristate-capped Ag nanoparticles (AgMy nanosheets) wereprepared at the air-water interface and transferred onto hydrophobized gold thin films basedon the Langmuir-Schaefer (LS) method [1]. The $SiO_2$ sputtered films with different thickness (0~100 nm) were deposited on the AgMy nanosheet as an insulator. TOPO-cappedCdSe/CdZnS/ZnS quantum dots (QDs, ${\lambda}Ex=638nm$) [2] were also transferred onto the $SiO_2$ films by the LS method. The layered structure is schematically shown in Fig. 1. The result of fluorescence measurement is shown in Fig. 2. Without the $SiO_2$ layer, the fluorescence intensity of the layered QD film was lower than that of the original QDs layer, i.e., the quenching by FRET was predominant. When the $SiO_2$ thickness was increased, the fluorescence intensity of the layered QD film was higher than that of the original QDs layer, i.e., the SPR enhancement was predominant. The fluorescence intensity was maximal at the $SiO_2$ thickness of 20 nm, particularly when the LSPR absorption wavelength (${\lambda}=480nm$) was utilized for the excitation. This plasmonic nanosheet can be integrated intogreen or bio-devices as the creation point ofenhanced LSPR field.

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Electrical properties of Metal-Oxide-Semiconductor (MOS) capacitor formed by oxidized-SiN (Oxidized-SiN으로 형성된 4H-SiC MOS capacitor.의 전기적 특성)

  • Moon, Jeong-Hyun;Kim, Chang-Hyun;Lee, Do-Hyun;Bahng, Wook;Kim, Nam-Kyun;Kim, Hyeong-Joon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.45-46
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    • 2009
  • We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with thin (${\approx}10\;nm$) Inductive-Coupled Plasma (ICP) CVD $Si_xN_y$ dielectric layers and investigated electrical properties of nitrided $SiO_2$/4H-SiC interface after oxidizing the $Si_xN_y$ in dry oxidation and/or $N_2$ annealing. An improvement of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements if compared with non-annealed oxidized-SiN. The improvements of SiC MOS capacitors formed by oxidized-SiN have been explained in this paper.

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In-Situ Fluorine Passivation by Excimer Laser Annealing

  • Jung, Sang-Hoon;Kim, Cheon-Hong;Jeon, Jae-Hong;Yoo, Juhn-Suk;Han, Min-Koo
    • Journal of Information Display
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    • v.1 no.1
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    • pp.25-28
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    • 2000
  • We propose a new in-situ fluorine passivation of poly-Si TFTs using excimer laser annealing to reduce the trap state density and improve reliability significantly. To investigate the effect of an in-situ fluorine passivation, we have fabricated fluorine-passivated p-channel poly-Si TFTs and examined their electrical characteristics and stability. A new in-situ fluorine passivation brought about an improvement in electrical characteristic. Such improvement is due to the formation of stronger Si-F bonds than Si-H bonds in poly-Si channel and $SiO_2$/Poly-Si interface.

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A New Programming Method of Scaled SONOS Flash Memory Ensuring 1$\times$10$^{6}$ Program/Erase Cycles and Beyond (1x10$^{6}$ 회 이상의 프로그램/소거 반복을 보장하는 Scaled SONOS 플래시메모리의 새로운 프로그래밍 방법)

  • 김병철;안호명;이상배;한태현;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.54-57
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    • 2002
  • In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

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The Improved Electrical Endurance(Program/Erase Cycles) Characteristics of SONOS Nonvolatile Memory Device (SONOS 비휘발성 기억소자의 향상된 프로그램/소거 반복 특성)

  • 김병철;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.1
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    • pp.5-10
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    • 2003
  • In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

Consideration on the various phenomena appeared at bonding interface in fusion-bonded silicon wafer pairs (용융접합된 규소 기판쌍에 있어서 접합 계면에 발생하는 제 현상들의 고찰)

  • Bhang, J.H.;Ju, B.K.;Oh, M.H.;Park, J.W.
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.1057-1059
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    • 1993
  • Some interested phenomena, which were appeared near the bonding interface, were investigated by angle lapping and delineation method, SEM, and TEM observations. Voids, defects, material continuity, and interfacial oxide stability were observed and discussed in the fusion-bonded Bi-Si or Si-$SiO_2$/Si wafer pairs.

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Improvement in the bias stability of zinc oxide thin-film transistors using an $O_2$ plasma-treated silicon nitride insulator

  • Kim, Ung-Seon;Mun, Yeon-Geon;Gwon, Tae-Seok;Park, Jong-Wan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.180-180
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    • 2010
  • Thin film transistors (TFTs) based on oxide semiconductors have emerged as a promising technology, particularly for active-matrix TFT-based backplanes. Currently, an amorphous oxide semiconductor, such as InGaZnO, has been adopted as the channel layer due to its higher electron mobility. However, accurate and repeatable control of this complex material in mass production is not easy. Therefore, simpler polycrystalline materials, such as ZnO and $SnO_2$, remain possible candidates as the channel layer. Inparticular, ZnO-based TFTs have attracted considerable attention, because of their superior properties that include wide bandgap (3.37eV), transparency, and high field effect mobility when compared with conventional amorphous silicon and polycrystalline silicon TFTs. There are some technical challenges to overcome to achieve manufacturability of ZnO-based TFTs. One of the problems, the stability of ZnO-based TFTs, is as yet unsolved since ZnO-based TFTs usually contain defects in the ZnO channel layer and deep level defects in the channel/dielectric interface that cause problems in device operation. The quality of the interface between the channel and dielectric plays a crucial role in transistor performance, and several insulators have been reported that reduce the number of defects in the channel and the interfacial charge trap defects. Additionally, ZnO TFTs using a high quality interface fabricated by a two step atomic layer deposition (ALD) process showed improvement in device performance In this study, we report the fabrication of high performance ZnO TFTs with a $Si_3N_4$ gate insulator treated using plasma. The interface treatment using electron cyclotron resonance (ECR) $O_2$ plasma improves the interface quality by lowering the interface trap density. This process can be easily adapted for industrial applications because the device structure and fabrication process in this paper are compatible with those of a-Si TFTs.

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