• 전기전자학회논문지
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• 제18권4호
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• pp.447-455
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• 2014

본 연구에서는 4H-SiC MOSFET의 주요 문제점인 $SiC/SiO_2$ 계면의 특성을 향상시키기 위해 PECVD (plasma enhanced chemical vapor deposition) 공정을 이용하여 n-based 4H-SiC MOS Capacitor를 제작하였다. 건식 산화 공정의 낮은 성장속도, 높은 계면포획 밀도와 $SiO_2$의 낮은 항복전계 등의 문제를 극복하기 위하여 PECVD와 NO어닐링 공정을 사용하여 MOS Capacitor를 제작하였다. 제작이 끝난 후, MOS Capacitor의 계면특성을 hi-lo C-V 측정, I-V 측정 및 SIMS를 이용해 측정하고 평가하였다. 계면의 특성을 건식 산화의 경우와 비교한 결과 20% 감소한 평탄대 전압 변화, 25% 감소한 $SiO_2$ 유효 전하 밀도, 8MV/cm의 증가한 $SiO_2$ 항복전계 및 1.57eV의 유효 에너지 장벽 높이, 전도대 아래로 0.375~0.495eV만큼 떨어져 있는 에너지 영역에서 69.05% 감소한 계면 포획 농도를 확인함으로써 향상된 계면 및 산화막 특성을 얻을 수 있었다.

• 한국재료학회지
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• 제28권2호
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• pp.118-123
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• 2018

5 nm-thick $SiO_2$ layers formed by plasma-enhanced chemical vapor deposition (PECVD) are densified to improve the electrical and interface properties by using nitric acid oxidation of Si (NAOS) method at a low temperature of $121^{\circ}C$. The physical and electrical properties are clearly investigated according to NAOS times and post-metallization annealing (PMA) at $250^{\circ}C$ for 10 min in 5 vol% hydrogen atmosphere. The leakage current density is significantly decreased about three orders of magnitude from $3.110{\times}10^{-5}A/cm^2$ after NAOS 5 hours with PMA treatment, although the $SiO_2$ layers are not changed. These dramatically decreases of leakage current density are resulted from improvement of the interface properties. Concentration of suboxide species ($Si^{1+}$, $Si^{2+}$ and $Si^{3+}$) in $SiO_x$ transition layers as well as the interface state density ($D_{it}$) in $SiO_2/Si$ interface region are critically decreased about 1/3 and one order of magnitude, respectively. The decrease in leakage current density is attributed to improvement of interface properties though chemical method of NAOS with PMA treatment which can perform the oxidation and remove the OH species and dangling bond.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1994년도 추계학술대회 논문집
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• pp.59-64
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• 1994

The Si-SiO$_2$interface trpas of the degraded short-channel SONOSFET memory devices were investigated using the charge pumping techniques. The degradation of devices with write/erase cycle appeared as the increase of the Si-SiO$_2$interface trap density. In order to determine the capture cross-section of the interface trap. I$\_$CP/-V$\_$GL/ characteristic curves were measured at different temperatures. Also, the spatial distributions of Si-SiO$_2$interface trap were examined by the variable-reverse bias boltage method.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.1268-1270
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• 1993

In this study, the characteristics of Si-$SiO_2$ interface and its degradation in short channel SONOSFET nonvolatile memory devices, fabricated by 1Mbit CMOS process($1.2{\mu}m$ design rule), with $65{\AA}$ blocking oxide layer, $205{\AA}$ nitride layer, and $30{\AA}$ tunneling oxide layer on the silicon wafer were investigated using the charge pumping method. For investigating the Si-$SiO_2$ interface characteristics before and after write/erase cycling, charge pumping current characteristics with frequencies, write/erase cycles, as a parameters, were measured. As a result, average Si-$SiO_2$ interface trap density and mean value of capture cross section were determined to be $1.203{\times}10^{11}cm^{-2}eV^{-1}\;and\;2.091{\times}10^{16}cm^2$ before write/erase cycling, respectively. After cycling, when the write/erase cycles are $10^4$, average $Si-SiO_2$ interface trap density was $1.901{\times}10^{11}cm^{-2}eV^{-1}$. Incresing write/erase cycles beyond about $10^4$, Si-$SiO_2$ interface characteristics with write/erase cycles was increased logarithmically.

• 한국재료학회지
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• 제16권2호
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• pp.92-98
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• 2006

Molecular dynamics simulations were performed to study interface structures between an $Al_2O_3$ crystalline phase and a interface phase of $CaAl_2Si_2O_8$. We calculated atomic structures and excess interface energies in systems with different thicknesses of the interface film. It was found that excess interface energies at first readily decreased with increasing film thickness, but increased for larger thicknesses of more than 2 nm. The excess energies of $Al_2O_3/CaAl_2Si_2O_8$ interfaces exhibit a minimum at a thickness around 1 nm. In this range of film thicknesses, the atoms in the interface film show a short-range ordered structure and slow diffusion rather than the random structure and rapid diffusion expected to an observation of an equilibrium thickness for interface films in ceramics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.157-158
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• 2007

Effects of post-metallization anneal (PMA) on interface trap characteristics of Si-$SiO_2$ are studied. The conventional PMA method utilizes forming gas anneal, where 10% hydrogen in nitrogen atmosphere is used. A new PMA method utilizes hydrogen rich PECVD- silicon nitride $(SiN_x)$ film as a hydrogen diffusion source and a out-diffusion blocking layer. It can be shown through charge pumping current measurement that the new PMA is indeed effective to decrease Si-$SiO_2$ interface trap density.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.418.2-418.2
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• 2016

$Al_2O_3$ passivation layer has excellent passivation properties at p-type Si surface. This $Al_2O_3$ layer forms thin $SiO_2$ layer at the interface. There were some studies about inserting thermal oxidation process to replace naturally grown oxide during $Al_2O_3$ deposition. They showed improving passivation properties. However, thermal oxidation process has disadvantage of expensive equipment and difficult control of thin layer formation. Wet chemical oxidation has advantages of low cost and easy thin oxide formation. In this study, $Al_2O_3$/$SiO_2/Si(100)$ interface was formed by wet chemical oxidation and PA-ALD process. $SiO_2$ layer at Si wafer was formed by $HCl/H_2O_2$, $H_2SO_4/H_2O_2$ and $HNO_3$, respectively. 20nm $Al_2O_3$ layer on $SiO_2/Si$ was deposited by PA-ALD. This $Al_2O_3/SiO_2/Si(100)$ interface were characterized by capacitance-voltage characteristics and quasi-steady-state photoconductance decay method.

• 한국재료학회지
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• 제4권2호
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• pp.127-135
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• 1994

직접 접합된 Si 기판들의 접합계면에 관하여 연구하였다. 경사 연마 및 결함묘사, 계면의 비등방성 식각, TEM 및 HR-TEM 등의 방법들을 이용하여 접합계면에 발생하는 계면결함과 과도영역, 여러형태의 void 들, 계면 산화막의 형성 및 안정화 과정등을 조사하였다. 또한 접합된 $Si-Sio_{2}$계면과 일반적인 $Si-Sio_{2}$계면의 형상등을 비교 검토하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.82-85
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• 1992

In this study, charge pumping method was used to investigate the Si-SiO$_2$interface characteristics of the nonvolatile SNOSFET memory devices, fabricated using the CMOS 1 Mbit processes (1.2$\mu\textrm{m}$ design rule), with thin oxide layer of 30${\AA}$ thick and nitride layer of 525${\AA}$ thick on the n-type silicon substrate (p-channel). Charge pumping current characteristics with the pulse base level were measured for various frequencies, falling times and rising times. By means of the charge dynamics in a non-steady state, the average Si-SiO$_2$interface state density and capture cross section were determined to be 3.565${\times}$10$\^$11/cm$\^$-2/eV$\^$-1/ and 4.834${\times}$10$\^$-16/$\textrm{cm}^2$, respectively. However Si-SiO$_2$ interface state densities were disributed 2.8${\times}$10$\^$-11/～5.6${\times}$10$\^$11/cm$\^$-2/～6${\times}$10$\^$11/cm$\^$-2/eV$\^$-1/ in the lover half of energy gap.

• 한국재료학회지
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• 제19권1호
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• pp.37-43
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• 2009

Silicon dioxide as gate dielectrics was grown at $400^{\circ}C$ on a polycrystalline Si substrate by inductively coupled plasma oxidation using a mixture of $O_2$ and $N_2O$ to improve the performance of polycrystalline Si thin film transistors. In conventional high-temperature $N_2O$ annealing, nitrogen can be supplied to the $Si/SiO_2$ interface because a NO molecule can diffuse through the oxide. However, it was found that nitrogen cannot be supplied to the Si/$SiO_2$ interface by plasma oxidation as the $N_2O$ molecule is broken in the plasma and because a dense Si-N bond is formed at the $SiO_2$ surface, preventing further diffusion of nitrogen into the oxide. Nitrogen was added to the $Si/SiO_2$ interface by the plasma oxidation of mixtures of $O_2/N_2O$ gas, leading to an enhancement of the field effect mobility of polycrystalline Si TFTs due to the reduction in the number of trap densities at the interface and at the Si grain boundaries due to nitrogen passivation.