• 한국잠사곤충학회지
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• 제31권1호
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• pp.20-24
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• 1989

7개 누에 품종으로 이면교잡하여 42개의 조합의 F1, F2세대에 대한 양적형질의 잡종강세와 약세현상을 검정한 결과는 다음과 같다. 잡종강세가 대체로 높은 형질은 견사량이 F1, F2세대의 I·II집단에서 15.57-38.69%, 단견중과 견층중은 F1, F2세대의 I·II집단에서 각각 11.29-21.65%, 7.44-23.73%로 정의 유의인데 반하여 5령경과와 연감율은 F1, F2세대의 I·II집단에서 각각 -0.57--6.62%, -1.74--6.06%의 부로 유의하였다. 단견중, 견층중, 견사장, 견사량 등의 수량적 형질은 F1세대가 F2세대보다 또 교배 I집단이 교배 II집단보다 높은 강세를 보였다. 큰 친에 대한 Heterobeltiosis는 단견중이 F1세대의 I·II집단에서, 견사량이 F1세대의 I집단에서 각각 정으로 유의하였고, 5령경과, 견층비율, 연감율은 F1, F2세대의 I·II집단에서 각각 부로 유의하였다. Inbreeding depression현상은 견층비율과 연감율이 교배 I·II에서 유의하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 추계학술대회 논문집
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• pp.149-150
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• 2007

ONO(Oxide-Nitride-Oxide)구조는 기억소자의 전하보유 능력을 향상시키기 위해 도입된 게이트 절연막이다. 본 연구에서는 ELA(Excimer Laser Annealing)방법으로 비정질 실리콘을 결정화 시켜서 그 위에 NVM(Nonvolatile Memory)소자를 만들어 전기적 특성을 측정하여 결과를 나타내었다. 실험 결과 같은 크기의 $V_D$에서 $V_G$를 조절함으로써 $I_D$의 크기를 조절할 수 있었다. $V_G-I_D$ Graph에서는 $I_{on}$과 $I_{off}$, 그리고 Threshold Voltage를 알 수 있었다. $I_{on}/I_{off}$ Ratio는 $10^3-10^4$이다. $V_G-I_D$ Graph에서는 게이트에 인가하는 Bias의 양을 통해서 Threshold Voltage의 크기를 조절할 수 있었다. 이는 Trap되는 Charge의 양을 임의로 조절할 수 있다는 것을 의미하며, 이러한 Programming과 Erasing의 특성을 이용하여 기억소자로서의 역할을 수행하게 된다.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1654-1659
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• 2014

Tunneling field-effect transistors (TFETs) are very applicable to low standby-power application by their virtues of low off-current ($I_{off}$) and small subthreshold swing (S). However, low on-current ($I_{on}$) of silicon-based TFETs has been pointed out as a drawback. To improve $I_{on}$ of TFET, a gate-all-around (GAA) TFET based on III-V compound semiconductor with InAs/InGaAs/InP multiple-heterojunction structure is proposed and investigated. Its performances have been evaluated with the gallium (Ga) composition (x) for $In_{1-x}Ga_xAs$ in the channel region. According to the simulation results for $I_{on}$, $I_{off}$, S, and on/off current ratio ($I_{on}/I_{off}$), the device adopting $In_{0.53}Ga_{0.47}As$ channel showed the optimum direct-current (DC) performance, as a result of controlling the Ga fraction. By introducing an n-type InGaAs thin layer near the source end, improved DC characteristics and radio-frequency (RF) performances were obtained due to boosted band-to-band (BTB) tunneling efficiency.

• 상하수도학회지
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• 제25권3호
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• pp.407-417
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• 2011

Nowadays, the high land use, mainly used for urbanization, is affecting runoff loads of non-point pollutants to increase. According to this fact, increasing runoff loads seems like to appear that it contributes to high ratio of pollution loads in the whole the pollution loads and that this non-point source is the main cause of water becoming worse quality. Especially, concentrated pollutants on the impermeable roads run off to the public water bodies. Also the coefficient of runoff from roads is high with a fast velocity of runoff, which ends up with consequence that a lot of pollutants runoff happens when it is raining. Therefore it is very important project to evaluate the quantity of pollutant loads. In this study, I computed the pollutant loadings depending on time and rainfall to analyze characteristics of runoff while first flush storm water and evaluated the runoff time while first flush storm water and rainfall based on the change in curves on the graph. I also computed contribution ratio to identify its impact on water quality of stream. I realized that the management and treatment of first flush storm water effluents is very important for the management of road's non-point source pollutants because runoff loads of non-point source pollution are over the 80% of whole loads of stream. Also according to the evaluation of runoff loads of first flush storm water for SS, run off time was shown under the 30 minute and rainfall was shown under the 5mm which is less than 20% of whole rainfall. These are under 5mm which is regarded amount of first flush storm water by the Ministry of Environment and it is judged to be because run off by rainfall is very fast on impermeable roads. Also, run off time and rainfall of BOD is higher than SS. Therefore I realized that the management of non-point source should be managed and done differently depending on each material. Finally, the contribution ratio of pollutants loads by rainfall-runoff was shown SS 12.7%, BOD 12.7%, COD 15.9%, T-N 4.9%, T-P 8.9%, however, the pollutants loads flowing into the steam was shown 4.4%. This represents that the concentration of non-point pollutants is relatively higher and we should find the methodical management and should be concerned about non-point source for improvement on water quality of streams.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.1336_1337
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• 2009

본 논문에서는 유기 박막 트랜지스터의 전극을 잉크젯 프린팅과 스크린 프린팅 방법을 이용하여 유기 박막 트랜지스터를 제작하였다. 전극으로 PEDOT:PSS와 Ag 잉크를 사용하였고, 게이트 절연막으로 polymethyl methacrylate (PMMA)와 poly(4-vinylphenol) (PVP)를 사용하였다. 유기물 활성층으로 pentacene을 진공 증착하였다. 잉크젯 프린팅 방법을 이용하여 제작한 유기 박막 트랜지스터는 전계이동도 (${\mu}_{FET}$) $0.068\;cm^2$/Vs, 문턱전압 ($V_{th}$) -15 V, 전류 점멸비 ($I_{on}/I_{off}$ current ratio) >$10^4$의 전기적 특성을 보였고, 스크린 인쇄 방법을 이용하여 제작한 유기 박막 트랜지스터는 전계이동도 (${\mu}_{FET}$) $0.016\;cm^2$/Vs, 문턱전압 ($V_{th}$) 6 V, 전류 점멸비 ($I_{on}/I_{off}$ current ratio) >$10^4$의 전기적 특성을 보였다. 이를 통하여 프린팅 방법을 이용한 유기 박막 트랜지스터 단일 소자 및 유기 전자 회로 제작의 가능성을 확인 하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2011년도 제42회 하계학술대회
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• pp.1412-1413
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• 2011

Effects of thermal annealing on electrical characteristics of thin film transistors (TFTs) using hydrogenated zinc oxide (ZnO:H) films as active channel were extensively investigated. The ZnO:H films were deposited at room temperature by RF sputtering. The device parameters of the ZnO:H-based TFTs, such as threshold voltage ($V_{th}$), subthreshold swing (S.S.), and on-off current ratio ($I_{on}/I_{off}$), were characterized in terms of the annealing temperature as well as the gas flow ratio of $H_2$/Ar.

• 품질경영학회지
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• 제16권1호
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• pp.23-31
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• 1988

This paper studies the handling of significant digits and rounding off methods in domestic industries. ANOVA tables made by six well-known big companies are selected and analyzed. There exist various mistakes in handling of significant digits and rounding off methods such as: * too many significant digits in the Sum of Squares values in comparison to the original data * too many significant digits in the variance ratio in comparison to the F table values. * no consistancy in the number of significant digits * no consideration for the number of significant digits in computations * ignoring the KS A 0021 in rounding off methods etc. Such mistakes are caused from the characteristics of the personal computers rather than the misunderstandings about the significant digits conception. A subroutine is developed for PC in BASIC language to help the handling of significant digits and rounding off.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.756-759
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• 2007

We have fabricated pentacene OTFT on ultra-thin flexible polyimide film with a rigid glass support. Polyimide film of the thickness of $10{\mu}m$ has formed on glass by spin coating from the solution. After the entire OTFT process, the OTFT exhibited a fieldeffect mobility of $0.4\;cm^2/Vs$, an $I_{on}/I_{off}$ ratio of $10^7$ and a subthreshold swing of 0.7 V/dec. The OTFT on polyimide film has been detached from the glass support and laminated on a plastic support of $130\;{\mu}m-thick$ PET film. After the detach process, in spite of the degrading of its field-effect mobility, the OTFT showed high $I_{on}/I_{off}$ as high $as{\sim}10^6$.

• 전기전자학회논문지
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• 제23권2호
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• pp.375-379
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• 2019

Zn와 Sn의 원자비가 2:1인 타겟을 고주파 스파터링하여 $ZnO-SnO_2(ZTO)$박막을 증착하고 열처리에 따른 구조적 특성변화를 조사하였다. 이 ZTO박막을 활성층으로 사용하여 투명박막트랜지스터(TTFT)를 제조하였다. 약 100 nm 두께의 $SiO_2$위에 100 nm의 $Si_3N_4$막을 기른 후 TTFT의 게이트 절연막으로 채택하였다. TTFT의 전달 특성을 통해 이동도, 문턱전압, 작동전류-차단전류 비($I_{on}/I_{off}$), 계면트랩밀도를 구하였다. 기판 가열 및 후속 열처리가 ZTO TTFT의 특성 변화에 미치는 영향을 분석하였다.

• 한국전기전자재료학회논문지
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• 제31권3호
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• pp.135-140
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• 2018

Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.