• Proceedings of the Korean Vacuum Society Conference
• /
• 2000.02a
• /
• pp.60-60
• /
• 2000

The adhesion interface formation between copper and poly(ethylene terephthalate)(PET), poly(methyl methacrylate)(PMMA) and Polyimide films was treated using Ion assisted reaction system to sequential sputter deposition by High-Frequency ion source. The ion beam modification system used a new type of low power HF ion thruster for space application as new low thruster electric propulsion system. Low power HF ion thruster with diameter 100mm gives the opportunity to obtain beams of Ar+ with currents 20~150 mA (current density 0.5~3.5 mA/cm2) and energy 200~2500eV at HF power level 10~150 W. Using Ar as a working gas it is possible to obtain thrust within 3~8 mN. Contact angles for untreated films were over 95$^{\circ}$ and 80 for Pet, 10o for PMMA and 12o for PI samples as a condition of ion assisted reaction at the ion dose of 10$\times$1016 ions/cm2, the ion beam potential of 1.2 keV and 4 ml/min for environmental gas flow rate. 900o peel tests yielded values of 15 to 35 for PET, 18 to 40 and 12 to 36 g/min. respectively. High resolution X-ray photoelectron spectrocopy is the Cls region for Cu metal on these polymer substrates showed increases in C=O-O groups for polymide, whereas PET and PMMA treated samples showed only C=O groups with increase the ion dose. Finally, unstable polymer surface can be changed from hydrophobic to hydrophilic formation such as C-O and C=O that were confirmed by the XPS analysis, conclusionally, the ion assisted reaction is very effective tools to attach reactive ion species to form functional groups on C-C bond chains of PET, PMMA and PI.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.21 no.1
• /
• pp.1-4
• /
• 2008

The electrical characteristics of polycrystalline silicon (poly-Si) thin film transistor (TFT) crystallized by excimer laser annealing (ELA) method were evaluated, The polycrystalline silicon thin-film transistor (poly-Si TFT) has higher electric field-effect-mobility and larger drivability than the amorphous silicon TFT. However, to poly-Si TFT's using conventional processes, the temperature must be very high. For this reason, an amorphous silicon film on a buried oxide was crystallized by annealing with a KrF excimer laser (248 nm)to fabricate a poly-Si film at low temperature. Then, High permittivity $HfO_2$ of 20 nm as the gate-insulator was deposited by atomic layer deposition (ALD) to low temperature process. In addition, the solid phase crystallization (SPC) was compared to the ELA method as a crystallization technique of amorphous-silicon film. As a result, the crystallinity and surface roughness of poly-Si crystallized by ELA method was superior to the SPC method. Also, we obtained excellent device characteristics from the Poly-Si TFT fabricated by the ELA crystallization method.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.2
• /
• pp.98-103
• /
• 2013

In this work, we investigated the enhanced performance of IZO-based TFTs with $HfSiO_x$ gate insulators. Four types of $HfSiO_x$ gate insulators using different diposition powers were deposited by co-sputtering $HfO_2$ and Si target. To simplify the processing sequences, all of the layers composing of TFTs were deposited by rf-magnetron sputtering method using patterned shadow-masks without any intentional heating of substrate and subsequent thermal annealing. The four different $HfSiO_x$ structural properties were investigated x-ray diffraction(XRD), atomic force microscopy(AFM) and also analyzed the electrical characteristics. There were some noticeable differences depending on the composition of the $HfO_2$ and Si combination. The TFT based on $HfSiO_x$ gate insulator with $HfO_2$(100W)-Si(100W) showed the best results with a field effect mobility of 2.0[$cm^2/V{\cdot}s$], a threshold voltage of -0.5[V], an on/off ratio of 5.89E+05 and RMS of 0.26[nm]. This show that the composition of the $HfO_2$ and Si is an important factor in an $HfSiO_x$ insulator. In addition, the effective bonding of $HfO_2$ and Si reduced the defects in the insulator bulk and also improved the interface quality between the channel and the gate insulator.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.360.1-360.1
• /
• 2014

DSSC (Dye-Sensitized Solar Cell)의 TCO (Transparent Conductive Oxide)와 전해질 사이의 전자 재결합(Back reaction)은 DSSC의 효율을 떨어뜨리는 요소 중 하나이다. 이와 같은 문제점을 해결하기 위하여 Blocking layer로서 $TiO_2$ 가 많이 사용되어지고 있다. 본 실험에서는 $HfO_2$ 를 Blocking layer로 사용하여 전자 재결합으로 인한 효율 저하를 막기 위한 연구를 진행하였다. 기존 $TiO_2$ 대비 $HfO_2$는 큰 에너지 밴드갭을 가지고 있어, TCO와 전해질 사이에 전자 재결합을 줄여주는 역할을 하기 때문에 DSSC의 효율 향상을 확인할 수 있다. 효율 측정은 1sun (100 mW/cm, AM1.5)조건에서 solar simulator를 이용하여 측정 했으며, 전자 재결합 감소는 Dark Current, EIS (Electrochemical Impedance spectroscopy)의 측정을 통하여 확인하였다. $HfO_2$를 이용한 blocking layer를 염료 감응 태양전지에 적용하면, 전자 재결합에 의한 손실을 줄여 성능적 측면에서 개선 가능할 것으로 생각된다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.11 no.1
• /
• pp.33-40
• /
• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.

• Applied Science and Convergence Technology
• /
• v.25 no.3
• /
• pp.56-60
• /
• 2016

The ALD process is an adequate technique to meet the requirements that come with the downscaling of semiconductor devices. To obtain thin films of the desired standard, it is essential to understand the thermal decomposition properties of the precursors. As such, this study examined the thermal decomposition properties of TEMAHf precursors and its effect on the formation of $HfO_2$ thin films. FT-IR experiments were performed before deposition in order to analyze the thermal decomposition properties of the precursors. The measurements were taken in the range of $135^{\circ}C-350^{\circ}C$. At temperatures higher than $300^{\circ}C$, there was a rapid decrease in the absorption peaks arising from vibration of $Sp^3$ C-H stretching. This showed that the precursors experienced rapid decomposition at around $275^{\circ}C-300^{\circ}C$. $HfO_2$ thin films were successfully deposited by Atomic Layer Deposition (ALD) at $50^{\circ}C$ intervals between $150^{\circ}C$ to $400^{\circ}C$; the deposited films were characterized using a reflectometer, X-ray photoelectron spectroscopy (XPS), Grazing Incidence X-ray Diffraction (GIXRD), and atomic force microscopy (AFM). The results illustrate the relationship between the thermal decomposition temperature of TEMAHf and properties of thin films.

• Proceedings of the International Microelectronics And Packaging Society Conference
• /
• 2002.05a
• /
• pp.198-202
• /
• 2002

$HfO_2$films were grown on Si substrate in the temperature range $250~550^{\circ}C$ using metal organic chemical vapor deposition (MOCVD) technique for a gate dielectric. Hafnium tart-butoxide and Oxygen gas were used as precursors and N2 was used as carrier gas. Impurity distribution and film structure(including interfacial layer) were studied at the deposition temperature range between 25$0^{\circ}C$ and $550^{\circ}C$. The growth rate and impurty distribution decreased with increasing temperature. The electrical properties of $HfO_2$were investigated with C-V, 1-V method and showed it has a good properties as a gate dielectric.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.12-12
• /
• 2010

Time dependence of the shift of the threshold voltage of amorphous hafnium-indium-zinc oxide (a-HIZO) has been reported under on-current stress condition. a-HIZO thin films were deposited on $SiO_2$/Si (100) by rf magnetron sputtering. XPS measurement indicates that the Hf metal cations in a-HIZO system after annealing process reduce oxygen vacancies by binding oxygen. It was found that the Hf metal cation can be effectively incorporated in the IZO thin films as a suppressor against both the oxygen deficiencies and the carrier generation in the ZnO-based system.

• Transactions on Electrical and Electronic Materials
• /
• v.8 no.2
• /
• pp.89-92
• /
• 2007

$CuInSe_2$ thin film were prepared in order to clarify optimum conditions for growth of the thin film depending upon process, and then by changing a number of deposition conditions and heat treatment conditions variously, structural and electrical characteristics were measured. Thereby, optimum process variables were derived. For the manufacture of the $CuInSe_2$, Cu, In and Se were deposited in the named order. Among them, Cu and In were deposited by using the sputtering method in consideration of their adhesive force to the substrate, and the DC/RF power was controlled so that the composition of Cu and In might be 1:1, while the annealing temperature having an effect on the quality of the thin film was changed from $200\;^{\circ}C$ to $350\;^{\circ}C$ at intervals of $50\;^{\circ}C$.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.284-284
• /
• 2013

중 에너지 이온 산란 분석법(Medium Energy Ion Scattering Spectrometer, MEIS)은 50~500 keV로 이온을 가속 후 시료에 입사시켜 시료의 원자와 핵간 충돌로 산란되는 일차이온의 에너지를 측정하여 시료를 분석하는 기법으로, 원자층의 깊이 분해능으로 초박막의 표면 계면의 조성과 구조를 분석 할수 있는 유용한 미세 분석기술이다. 본 실험에서 에너지 70~100 keV의 He+ 이온을 사용하여 Pulse Width 1 ns의 Pulsed ion beam을 만들어 Start 신호로 사용하고 Delay-line-detector에 검출된 신호를 End 신호를 이용한 TOF-MEIS System을 개발하였다. 활용 가능한 분석시편으로 Ultra thin film 시편으로 1, 1.5, 2, 2.5, 3, 4 nm의 HfO2, 1.8, 4nm의 SiO2 시편을 분석 하였으며 Ultra Shallow Junction 시편으로 As Doped Si, Cs Doped Si 시편 및 Composition, Core/shell 구조의 Q-dot 시편으로 CdSe, CdSe/ZnS등 다양한 분석 실험을 진행 하였다. Composition, Core/shell 구조의 Q-dot 시편은 Diamond Like Carbon(DLC)의 Substrate에 Mono-layer로 형성하여 분석하였다.