• Title/Summary/Keyword: $Ga_2O_3$ Substrate

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Hybrid MBE Growth of Crack-Free GaN Layers on Si (110) Substrates

  • Park, Cheol-Hyeon;O, Jae-Eung;No, Yeong-Gyun;Lee, Sang-Tae;Kim, Mun-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.183-184
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    • 2013
  • Two main MBE growth techniques have been used: plasma-assisted MBE (PA-MBE), which utilizes a rf plasma to supply active nitrogen, and ammonia MBE, in which nitrogen is supplied by pyrolysis of NH3 on the sample surface during growth. PA-MBE is typically performed under metal-rich growth conditions, which results in the formation of gallium droplets on the sample surface and a narrow range of conditions for optimal growth. In contrast, high-quality GaN films can be grown by ammonia MBE under an excess nitrogen flux, which in principle should result in improved device uniformity due to the elimination of droplets and wider range of stable growth conditions. A drawback of ammonia MBE, on the other hand, is a serious memory effect of NH3 condensed on the cryo-panels and the vicinity of heaters, which ruins the control of critical growth stages, i.e. the native oxide desorption and the surface reconstruction, and the accurate control of V/III ratio, especially in the initial stage of seed layer growth. In this paper, we demonstrate that the reliable and reproducible growth of GaN on Si (110) substrates is successfully achieved by combining two MBE growth technologies using rf plasma and ammonia and setting a proper growth protocol. Samples were grown in a MBE system equipped with both a nitrogen rf plasma source (SVT) and an ammonia source. The ammonia gas purity was >99.9999% and further purified by using a getter filter. The custom-made injector designed to focus the ammonia flux onto the substrate was used for the gas delivery, while aluminum and gallium were provided via conventional effusion cells. The growth sequence to minimize the residual ammonia and subsequent memory effects is the following: (1) Native oxides are desorbed at $750^{\circ}C$ (Fig. (a) for [$1^-10$] and [001] azimuth) (2) 40 nm thick AlN is first grown using nitrogen rf plasma source at $900^{\circ}C$ nder the optimized condition to maintain the layer by layer growth of AlN buffer layer and slightly Al-rich condition. (Fig. (b)) (3) After switching to ammonia source, GaN growth is initiated with different V/III ratio and temperature conditions. A streaky RHEED pattern with an appearance of a weak ($2{\times}2$) reconstruction characteristic of Ga-polarity is observed all along the growth of subsequent GaN layer under optimized conditions. (Fig. (c)) The structural properties as well as dislocation densities as a function of growth conditions have been investigated using symmetrical and asymmetrical x-ray rocking curves. The electrical characteristics as a function of buffer and GaN layer growth conditions as well as the growth sequence will be also discussed. Figure: (a) RHEED pattern after oxide desorption (b) after 40 nm thick AlN growth using nitrogen rf plasma source and (c) after 600 nm thick GaN growth using ammonia source for (upper) [110] and (lower) [001] azimuth.

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A Study on Selective Epitaxial Growth using Disilane and Hydrogen gas in Low Pressure chemical vapor deposition ($Si_{2}H_{6}$$H_2$ Gas를 이용한 LPCVD 내에서의 선택적 Epitaxy 성장에 관한 연구)

  • 손용훈;김상훈;박성계;남승의;김형준
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.11a
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    • pp.471-475
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    • 2000
  • P-type (100) Si wafer patterned with 1000$\AA$ SiO$_2$island was used as substrate and the Si films were deposited under low pressure using Si$_2$H$_{6}$-H$_2$gas mixture where the total gas flow rate and deposition pressure were 16.6sccm and 3.5mtorr, respectively. In this condition, we selectively obtained high-quality epitaxial Si layer of the 350~1050$\AA$ thickness. In order to extend the incubation period, we kept high pressure H$_2$ environment without Si$_2$H$_{6}$ gas for few minutes after first incubation period and then we conformed the existence of second incubation period.iod.

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Electrical Characteristic of IGZO Oxide TFTs with 3 Layer Gate Insulator

  • Lim, Sang Chul;Koo, Jae Bon;Park, Chan Woo;Jung, Soon-Won;Na, Bock Soon;Lee, Sang Seok;Cho, Kyoung Ik;Chu, Hye Yong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.344-344
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    • 2014
  • Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

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Preparation of Nanoporous Ceramic Membranes by Sol-gel Method and Characterization of Gas Permeation (졸-겔법에 의한 나노기공성 세라믹 막의 제조 및 기체투과 특성)

  • Lee, Yong-Taek;Choi, Ga-Young;Han, Hyuk-Hee
    • Membrane Journal
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    • v.18 no.2
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    • pp.176-184
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    • 2008
  • Nano-porous ceramic membranes was synthesized by the sol-gel method. Gas permeation of hydrogen and nitrogen was determined by single composition gas. Pore size $0.1{\mu}m$ and porosity 32% of flat type ${\alpha}-Al_2O_3$ substrate was manufactured. An intermediate ${\gamma}-Al_2O_3$ layer with pore size of 4 nm was formed by dip-coating. Polymeric silica sol was synthesized by acid catalyzed hydrolysis and condensation of tetra-ethyl-ortho-silicate. Supported membranes on alumina were prepared by dipping and calcining. He, $N_2$ permeation experiments with nanoporous sol-gel modified supported ceramic membranes were peformed to determine the gas transport characteristics. $He/N_2$ permselectivity around $100{\sim}160$ and helium permeation in the order of $10^{-7}mol/m^2{\cdot}s{\cdot}Pa$ were measured in the temperature range of $303{\sim}363K$.

기판-타겟간 거리가 선형 대향 타겟 스퍼터 시스템으로 성장시킨 AGZO 전극 특성에 미치는 효과 연구

  • Sin, Hyeon-Su;Seo, Gi-Won;Lee, Ju-Hyeon;Kim, Han-Gi
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.533-533
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    • 2013
  • 본 연구에서는 선형 대향 타겟 스퍼터 시스템을 이용하여 hetero sputtering방법으로 증착한Al-Ga-Zn-O (AGZO) 박막의 기판-타겟간 거리(Target-to-Substrate distance)에 따른 전기적, 광학적, 구조적 특성을 분석하였다. 타겟과 기판 사이의 거리 변화(30~120 mm)에 따른 AGZO 박막의 특성 변화를 관찰하기 위하여 일정한 DC 파워 250 W, 공정압력 0.3 mTorr, Ar 20 sccm에서 서로 다른 AZO 타겟과 GZO 타겟을 이용하여 hetero-sputtering 공정을 진행하였다. 최적의 타겟과 기판 사이의 거리를 결정하기 위해 AGZO 박막의 투과도(T)와 면저항($R_{sh}$)을 기반으로 figure of merit ($T^{10}/R_{sh}$)값을 계산하였다. 기판-타겟간 거리는 AGZO 박막의 밀도에 영향을 주는 핵심 인자로 30 mm에서 120 mm로 증가수록 밀도가 낮은 AGZO 박막이 형성되었다. 최적의 타겟과 기판 사이의 거리(30 mm)에서 AGZO 박막은 132 Ohm/sq의 낮은 면저항과 87.2%의 높은 투과도를 나타내었다. 그러나 기판-타겟간 거리가 증가할수록 같은 두께에서 면저항은 급격히 증가함을 발견할 수 있었으며 이러한 특성 변화는 스퍼터되어 기판에 도달하는 입자의 에너지 차이로 설명이 가능하다. 따라서 본 연구에서는 기판-타겟간 거리에 따른 AGZO 박막의 특성 변화를 설명할 수 있는 메커니즘을 다양한 분석을 통해 제시하였다. 또한 적화된 AGZO 투명 전극을 이용해 제작한 GaN-LED의 Damage free sputtering 기술에 대해서 소개한다.

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Effects of RF power on the Electrical and Optical Properties of GZO Thin Films Deposited on Flexible Substrate (RF 파워가 플렉시블 기판에 성장시킨 GZO 박막의 전기적 및 광학적 특성에 미치는 영향)

  • Joung, Yang-Hee;Kang, Seong-Jun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2497-2502
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    • 2014
  • The 5 wt.% Ga-doped zinc oxide (GZO) thin films were fabricated on PES substrates with various RF power 50~80 W by using RF magnetron sputtering in order to investigate the optical and electrical properties of GZO thin films. The XRD measurement showed that GZO thin films exhibit c-axis orientation. At a RF power of 70W, the GZO thin film showed the highest (002) diffraction peak with a Full-Width-Half-Maximum (FWHM) of $0.44^{\circ}$. AFM analysis showed that the lowest surface roughness (0.20 nm) was obtained for the GZO thin film fabricated at 70 W of RF power. The electrical property indicated that the minimum resistivity ($6.93{\times}10^{-4}{\Omega}{\cdot}cm$) and maximum carrier concentration ($7.04{\times}10^{20}cm^{-3}$) and hall mobility ($12.70cm^2/Vs$) were obtained in the GZO thin film fabricated at 70W of RF power. The optical transmittance in the visible region was higher than 80 %, regardless of RF power. The optical band-gap showed the slight blue-shift with increased in carrier concentration which can be explained by the Burstein-Moss effect.

Microstructure Evaluation and Wear Resistance Property of Al-Si-X/Al2O3 Composite by the Displacement Reaction in Al-Mg Alloy Melt using High Energy Mechanical Milled Al-SiO2-X Composite Powder (HEMM Al-SiO2-X 복합 분말을 Al-Mg 용탕에서 자발 치환반응으로 제조된 Al-Si-X/Al2O3 복합재료의 조직 및 마멸 특성)

  • Woo, Kee-Do;Kim, Dong-Keon;Lee, Hyun-Bom;Moon, Min-Seok;Ki, Woong;Kwon, Eui-Pyo
    • Korean Journal of Materials Research
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    • v.18 no.6
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    • pp.339-346
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    • 2008
  • Single-crystal $ZnIn_2S_4$ layers were grown on a thoroughly etched semi-insulating GaAs (100) substrate at $450^{\circ}C$ with a hot wall epitaxy (HWE) system by evaporating a $ZnIn_2S_4$ source at $610^{\circ}C$. The crystalline structures of the single-crystal thin films were investigated via the photoluminescence (PL) and Double-crystal X-ray rocking curve (DCRC). The temperature dependence of the energy band gap of the $ZnIn_2S_4$ obtained from the absorption spectra was well described by Varshni's relationship, $E_g(T)=2.9514\;eV-(7.24{\times}10^{-4}\;eV/K)T2/(T+489K)$. After the as-grown $ZnIn_2S_4$ single-crystal thin films was annealed in Zn-, S-, and In-atmospheres, the origin-of-point defects of the $ZnIn_2S_4$ single-crystal thin films were investigated via the photoluminescence (PL) at 10 K. The native defects of $V_{Zn}$, $V_S$, $Zn_{int}$, and $S_{int}$ obtained from the PL measurements were classified as donor or acceptor types. Additionally, it was concluded that a heat treatment in an S-atmosphere converted $ZnIn_2S_4$ single crystal thin films into optical p-type films. Moreover, it was confirmed that In in $ZnIn_2S_4$/GaAs did not form a native defects, as In in $ZnIn_2S_4$ single-crystal thin films existed in the form of stable bonds.

Chemical Mechanical Polishing: A Selective Review of R&D Trends in Abrasive Particle Behaviors and Wafer Materials (화학기계적 연마기술 연구개발 동향: 입자 거동과 기판소재를 중심으로)

  • Lee, Hyunseop;Sung, In-Ha
    • Tribology and Lubricants
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    • v.35 no.5
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    • pp.274-285
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    • 2019
  • Chemical mechanical polishing (CMP), which is a material removal process involving chemical surface reactions and mechanical abrasive action, is an essential manufacturing process for obtaining high-quality semiconductor surfaces with ultrahigh precision features. Recent rapid growth in the industries of digital devices and semiconductors has accelerated the demands for processing of various substrate and film materials. In addition, to solve many issues and challenges related to high integration such as micro-defects, non-uniformity, and post-process cleaning, it has become increasingly necessary to approach and understand the processing mechanisms for various substrate materials and abrasive particle behaviors from a tribological point of view. Based on these backgrounds, we review recent CMP R&D trends in this study. We examine experimental and analytical studies with a focus on substrate materials and abrasive particles. For the reduction of micro-scratch generation, understanding the correlation between friction and the generation mechanism by abrasive particle behaviors is critical. Furthermore, the contact stiffness at the wafer-particle (slurry)-pad interface should be carefully considered. Regarding substrate materials, recent research trends and technologies have been introduced that focus on sapphire (${\alpha}$-alumina, $Al_2O_3$), silicon carbide (SiC), and gallium nitride (GaN), which are used for organic light emitting devices. High-speed processing technology that does not generate surface defects should be developed for low-cost production of various substrates. For this purpose, effective methods for reducing and removing surface residues and deformed layers should be explored through tribological approaches. Finally, we present future challenges and issues related to the CMP process from a tribological perspective.

Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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Removal of Anodic Aluminum Oxide Barrier Layer on Silicon Substrate by Using Cl2 BCl3 Neutral Beam Etching

  • Kim, Chan-Gyu;Yeon, Je-Gwan;Min, Gyeong-Seok;O, Jong-Sik;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.480-480
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    • 2011
  • 양극산화(anodization)는 금속을 전기화학적으로 산화시켜 금속산화물로 만드는 기술로서 최근 다양한 크기의 나노 구조를 제조하는 기술로 각광받고 있으며, 이러한 기술에 의하여 얻어지는 anodic aluminum oxide(AAO)는 magnetic data storage, optoelectronic device, sensor에 적용될 수 있는 nano device 뿐만 아니라 nanostructure를 제조하기 위한 template 및 mask로써 최근 광범위 하게 연구되고 있다. 또한, AAO는 Al2O3의 단단한 구조를 가진 무기재료이므로 solid mask로써 다른 porous materials 보다 뛰어난 특성을 갖고 있다. 또한 electron-beam lithography 및 block co-polymer 에 의한 patterning 과 비교하여 매우 경제적이며, 재현성이 우수할 뿐만 아니라 대면적에서 나노 구조의 크기 및 형상제어가 비교적 쉽기 때문에 널리 사용되고 있다. 그러나, AAO 형성 시 생기게 되는 반구형 모양의 barrier layer는 물질(substance)과 기판과의 direct physical and electrical contact을 방해하기 때문에 해결해야 할 가장 큰 문제점 중 하나로 알려져 있다. 따라서 본 연구에서는 실리콘 기판위의 형성된 AAO의 barrier layer를 Cl/BCl3 gas mixture에서 Neutral Beam Etching (NBE)과 Ion Beam Etching (IBE) 로 각각 식각한 후 그 결과와 비교하였다. NBE와 IBE 모두 Cl2/BCl3 gas mixture에서 BCl3 gas의 첨가량이 60% 일 경우 etch rate이 가장 높게 나타났고, optical emission spectroscopy (OES)로 Cl2/BCl3 플라즈마 내의 Cl radical density와 X-ray photoelectron spectroscopy (XPS)로 AAO 표면 위를 관찰한 결과 휘발성 BOxCly의 형성이 AAO 식각에 크게 관여함을 확인 할 수 있었다. 또한, NBE와 IBE 실험한 다양한 Cl2/BCl3 gas mixture ratio 에서 AAO가 식각이 되지만, 이온빔의 경우 나노사이즈의 AAO pore의 charging에 의해 pore 아래쪽의 위치한 barrier layer를 어떤 식각조건에서도 제거하지 못하였다. 하지만, NBE에서는 BCl3-rich Cl2/BCl3 gas mixture인 식각조건에서 AAO pore에 휘발성 BOxCly를 형성하면서 barrier layer를 제거할 수 있었다.

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