반도체공학회 논문지 (Transactions on Semiconductor Engineering)

반도체공학회 (The Institute of Semiconductor Engineers)
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HLS 를 이용한 FPGA 기반 양자내성암호 하드웨어 가속기 설계

FPGA-Based Post-Quantum Cryptography Hardware Accelerator Design using High Level Synthesis

  • Haesung Jung (Department of Electrical and Computer Engineering, Inha University) ;
  • Hanyoung Lee (Department of Electrical and Computer Engineering, Inha University) ;
  • Hanho Lee (Department of Electrical and Computer Engineering, Inha University)
  • 투고 : 2023.09.14
  • 심사 : 2023.10.16
  • 발행 : 2023.10.31
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초록

본 논문에서는 High-Level Synthesis(HLS)을 이용하여, 차세대 양자내성암호인 Crystals-Kyber를 하드웨어 가속기로 설계하여 FPGA에 구현하였으며, 성능 분석결과 우수성을 제시한다. Crystals-Kyber 알고리즘을 Vitis HLS 에서 제공하는 여러 Directive 를 활용해서 최적화 설계를 진행하고, AXI Interface 를 구성하여 FPGA-기반 양자내성암호 하드웨어 가속기를 설계하였다. Vivado 툴을 이용해서 IP Block Design 를수행하고 ZYNQ ZCU106 FPGA 에 구현하였다. 최종적으로 PYNQ 프레임워크에서 Python 코드로 동영상 촬영 및 H.264 압축을 진행한 후, FPGA 에 구현한 Crystals-Kyber 하드웨어 가속기를 사용해서 동영상 암호화 및 복호화 처리를 가속화하였다.

This paper presents the design and implementation of Crystals-Kyber, a next-generation postquantum cryptography, as a hardware accelerator on an FPGA using High-Level Synthesis (HLS). We optimized the Crystals-Kyber algorithm using various directives provided by Vitis HLS, configured the AXI interface, and designed a hardware accelerator that can be implemented on an FPGA. Then, we used Vivado tool to design the IP block and implement it on the ZYNQ ZCU106 FPGA. Finally, the video was recorded and H.264 compressed with Python code in the PYNQ framework, and the video encryption and decryption were accelerated using Crystals-Kyber hardware accelerator implemented on the FPGA.

키워드

과제정보

이 논문은 정부(과학기술정보통신부)의 재원으로 한국연구재단의 지원 (No. 2021R1A2C1011232)과 한국연구재단-시스템반도체융합전문인력 육성사업 지원을 받아 수행된 연구임(No.2020M3H2A1076786).

참고문헌

  1. "PQC (Post-Quantum Cryptography) Selected Algorithms 2022," NIST, last modified Aug 24, 2023, accessed Sep 4, 2023. https://csrc.nist.gov/Projects/post-quantum-cryptography/selected-algorithms-2022.
  2. "Comments Requested on Three Draft FIPS for Post-Quantum Cryptography" NIST, last modified Aug 24, 2023, accessed Sep 4, 2023. https://csrc.nist.gov/news/2023/three-draft-fips-for-post-quantum-cryptography.
  3. R. Avanzi, et. al. "CRYSTALS-Kyber Algorithm Specifications And Supporting Documentation (version 3.02)," NIST PQC Round 3 submission, Aug. 2021.
  4. Vitis High-Level Synthesis, "User Guide," UG 1399, v2021.2, July 17, 2023.
  5. T. N. Tan, S. Kim, Y. Eom and H. Lee, "Area-Time Efficient Hardware Architecture for CRYS TALS-Kyber," Applied Sciences, 12(11), 5305, May 24, 2022.
  6. D. T. Nguyen, V. B. Dang and K. Gaj, "A High-Level Synthesis Approach to the Software/Hardware Codesign of NTT-based Post-Quantum Cryptography Algorithms," 2019 International Conference on Field-Programmable Technology (ICFPT), pp. 371-374, Dec., 2019.
  7. P. W. Shor, "Polynomial-time algorithms for prime factorization and discrete logarithms on a quantum computer," SIAM J. Comput., vol. 26, pp. 1484-1509, Oct. 1997. https://doi.org/10.1137/S0097539795293172
  8. O. Regev, "On lattices, learning with errors, random linear codes, and cryptography," in Proceedings of the ACM Symposium on Theory of Computing, Baltimore, USA, pp. 84-93, May. 2005.
  9. V. Lyubashevsky, "On ideal lattices and learning with errors over rings," Annual international conference on the theory and applications of cryptographic techniques, pp. 1-23, 2010.
  10. T. Zijlstra, K. Bigou, A. Tisserand, "Lattice-Based Cryptosystems on FPGA: Parallelization and Comparison Using HLS", IEEE Transactions on Computers, Vol. 71, Aug. 2022.
  11. J. P. Smith et al., "A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC," IEEE Open Journal of Circuits and Systems, Vol. 2, pp. 241-252, 2021, doi: 10.1109/OJCAS.2020.3041208.
  12. 이창현, " 양자내성암호시스템의 HLS-기반 HW/SW 공동 설계와 HLS-RTL Hybrid 설계", 공학석사논문, Feb. 2022.
  13. E. Ozcan and A. Aysu, "High-Level Synthesis of Number-Theoretic Transform: A Case Study for Future Cryptosystems," IEEE Embedded Systems Letters, vol. 12, no. 4, pp. 133-136, Dec. 2020, doi: 10.1109/LES.2019.2960457.
  14. V. Kostalabros, J. Ribes-Gonzalez, O. Farras, M. Moreto and C. Hernandez, "HLS-Based HW/SW Co-Design of the Post-Quantum Classic McEliece Cryptosystem," 2021 31st International Conference on Field-Programmable Logic and Applications (FPL), Dresden, Germany, pp. 52-59, 2021.
  15. A. Guerrieri et al., "Design Exploration and Code Optimizations for FPGA-Based Post-Quantum Cryptography using High-Level Synthesis", TechRxiv, Mar. 2022, doi: 10.36227/techrxiv.19404413.v1