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Electro-Thermal Annealing of 3D NAND Flash Memory Using Through-Silicon Via for Improved Heat Distribution

Through-Silicon Via를 활용한 3D NAND Flash Memory의 전열 어닐링 발열 균일성 개선

  • Young-Seo, Son (School of Electronics Engineering, Chungbuk National University) ;
  • Khwang-Sun, Lee (School of Electronics Engineering, Chungbuk National University) ;
  • Yu-Jin, Kim (School of Electronics Engineering, Chungbuk National University) ;
  • Jun-Young, Park (School of Electronics Engineering, Chungbuk National University)
  • Received : 2022.09.20
  • Accepted : 2022.10.06
  • Published : 2023.01.01

Abstract

This paper demonstrates a novel NAND flash memory structure and annealing configuration including through-silicon via (TSV) inside the silicon substrate to improve annealing efficiency using an electro-thermal annealing (ETA) technique. Compared with the conventional ETA which utilizes WL-to-WL current flow, the proposed annealing method has a higher annealing temperature as well as more uniform heat distribution, because of thermal isolation on the silicon substrate. In addition, it was found that the annealing temperature is related to the electrical and thermal conductivity of the TSV materials. As a result, it is possible to improve the reliability of NAND flash memory. All the results are discussed based on 3-dimensional (3-D) simulations with the aid of the COMSOL simulator.

Keywords

Acknowledgement

This work was partially supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MIST) (No. 2021R1F1A1049456).

References

  1. C. M. Compagnoni, A. Goda, A. S. Spinelli, P. Feeley, A. L. Lacaita, and A. Visconti, Proc. IEEE, 105, 1609 (2017). [DOI: https://doi.org/10.1109/JPROC.2017.2665781]
  2. S. Y. Lee, J.-S. Oh, S.-D. Yang, K.-S. Jeong, H.-J. Yun, Y.-M. Kim, H.-D. Lee, and G.-W. Lee, J. Korean Inst. Electr. Electron. Mater. Eng., 25, 85 (2012). [DOI: https://doi.org/10.4313/JKEM.2012.25.2.85]
  3. S.-H. Baek, K.-H. Song, and H.-Y. Lee, J. Korean Inst. Electr. Electron. Mater. Eng., 23, 261 (2010). [DOI: https://doi.org/10.4313/JKEM.2010.23.4.261]
  4. J.-H. Jang, H.-S Kim, W.-S Cho, H.-S Cho, J.-H Kim, S.-I Shim, Younggoan, J.-H. Jeong, B.-K Son, D.-W Kim, Kihyun, J.-J. Shim, J.-S. Lim, K.-H. Kim, S.- Y. Yi, J.-Y. Lim, D.-W Chung, H.-C. Moon, S.-M Hwang, J.-W Lee, Y.-H. Son, U.-I.Chung and W.-S. Lee, Proc. 2007 IEEE Symp. VLSI Technol. pp.192-193.
  5. N. Righetti and G. Puzzilli, Proc 2017 IEEE Int. Integ. Rel. Wrksp. (IIRW) pp. 1-6. [DOI: https://doi.org/10.1109/IIRW.2017.8361235]
  6. H. Tanaka, M. Kido, K. Yahashi, M. Oomura, R. Katsumata, M. Kito, Y. Fukuzumi, M. Sato, Y. Nagata, Y. Matsuoka, Y. Iwata, H. Aochi, and A. Nitayama, Proc. 2007 IEEE Symp. VLSI Technol. (Kyoto, Japan, 2007) pp. 14-15. [DOI: https://doi.org/10.1109/VLSIT.2007.4339708]
  7. Y.-J. Kim and J.-Y. Park, J. Korean Inst. Electr. Electron. Mater. Eng., 35, 246 (2022). [DOI: https://doi.org/10.4313/JKEM.2022.35.3.6]
  8. K. Onishi, C.-S. Kang, R. Choi, H.-J. Cho, S. Gopalan, R.E. Nieh, S.A. Krishnan, and J.C. Lee, Proc. IEEE T. Electron Dev., 50, 384 (2003). [DOI: https://doi.org/10.1109/TED.2002.807447]
  9. H.-T. Lue, P.-Y. Du, C.-P. Chen, W.-C. Chen, C.-C. Hsieh, Y.-H. Hsiao, Y.-H. Shih, and C.-Y. Lu, Proc. 2012 International Electron Devices Meeting (IEEE, San Francisco, USA, 2012) pp. 9.1.1-9.1.4. [DOI: https://doi.org/10.1109/IEDM.2012.6479008]
  10. T.-H. Hsu, H.-T. Lue, P.-Y. Du, W.-C. Chen, T.-H. Yeh. R. Lo, H.-S. Chang, K.-C. Wang, and C.-Y. Lu, Proc. 2019 IEEE 11th International Memory Workshop (IMW), (Monterey, CA, USA, 2019) pp. 1-4. [DOI: https://doi.org/10.1109/IMW.2019.8739692]
  11. D.-I. Moon, J.-Y. Park, J.-W. Han, G.-J. Jeon, J.-Y. Kim, J. Moon, M.-L. Seol, C. Ki Kim, H.-C. Lee, M. Meyyappan, and Y.-K. Choi, Proc. 2016 IEEE Int. El. Devices Meet. (IEDM), pp. 31.8.1-31.8.4. [DOI: https://doi.org/10.1109/IEDM.2016.7838524]
  12. D.-H. Wang and J.-Y. Park, J. Korean Inst. Electr. Electron. Mater. Eng., 35, 50 (2022). [DOI: https://doi.org/10.4313/JKEM.2022.35.1.8]
  13. J.-Y. Park, D.-H. Yun, S.-Y. Kim, and Y.-K. Choi, IEEE Electr. Device L., 40, 212 (2019). [DOI: https://doi.org/10.1109/LED.2018.2889037]
  14. D.-H. Jung, K.-S. Lee, and J.-Y. Park, J. Semicond. Technol. Sci., 21, 334 (2021). [DOI: https://doi.org/10.5573/JSTS.2021.21.5.334]
  15. J.-Y. Park, D.-I. Moon, M.-L. Seol, C.-K. Kim, C.-H. Jeon, H. Bae, T. Bang, and Y.-K. Choi, IEEE T. Electron Dev., 63, 910 (2016). [DOI: https://doi.org/10.1109/TED.2015.2513744]