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Hardware Structure of Cross Correlation based PSS Detector for Cell Search and Synchronization of 5G NR Systems

5G NR 셀 탐색과 동기화를 위한 교차상관관계 기반 PSS 검출기 구조

  • Lee, Jin (Department of Communication and Information, Pyeongtaek University)
  • Received : 2022.01.20
  • Accepted : 2022.02.19
  • Published : 2022.03.31

Abstract

All 5G NR devices must first perform the cell search and synchronization process to communicate with the base station. In this process, PSS detection is one of the most important and difficult problems in 5G NR communication because PSS detection must first be successful in order to extract essential information from the following signals. Among the various PSS detection methods, this paper describes a cross-correlation-based detection method, and the implementation methods of the tap delay line hardware with parallelization are introduced and compared in terms of complexity and detection speed. In addition, the interface required for system configuration including the PSS detector and control software for efficient and flexible operation are also explained. In this paper, the resource usages of Xilinx's UltraScale+ FPGA are compared for various PSS detector structures and analyzed according to various parallelization levels.

5G NR 모든 기기는 기지국과 통신을 위해 가장 먼저 셀 탐색 및 동기화 과정을 진행해야 한다. 이 과정에서 PSS 검출이 제일 먼저 성공적으로 수행되어야 하므로, PSS 검출은 5G NR 통신에서 가장 중요하고 어려운 문제 중 하나이다. 다양한 PSS 검출 방법 중 본 논문에서는 교차상관관계 기반의 검출 방법에 대해 소개하고 복잡도와 검출 속도를 고려한 하드웨어 구조에 대해서 설명한다. 또한, PSS 검출기를 포함하는 시스템 구성을 위해 필요한 인터페이스와 효율적이고 유연한 동작을 위한 구동 소프트웨어 동작도 제안하고, 이를 구현하였을 때 Xilinx사의 UltraScale+ FPGA의 자원 사용량을 다양한 구조에 따라 비교 분석한다.

Keywords

Acknowledgement

Following are results of a study on the "Leaders in INdustry-university Cooperation +" Project, supported by the Ministry of Education and National Research Foundation of Korea

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