Electronics and Telecommunications Trends (전자통신동향분석)

Electronics and Telecommunications Research Institute (한국전자통신연구원)
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Issues on Monolithic 3D Integration Techniques for Realizing Next Generation Intelligent Devices

차세대 지능형 소자 구현을 위한 모노리식 3D 집적화 기술 이슈

  • 문제현 (플렉시블전자소자연구실) ;
  • 남수지 (플렉시블전자소자연구실) ;
  • 주철웅 (플렉시블전자소자연구실) ;
  • 성치훈 (플렉시블전자소자연구실) ;
  • 김희옥 (실감디스플레이연구실) ;
  • 조성행 (플렉시블전자소자연구실) ;
  • 박찬우 (플렉시블전자소자연구실)
  • Published : 2021.06.01
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Abstract

Since the technical realization of self-aligned planar complementary metal-oxide-semiconductor field-effect transistors in 1960s, semiconductor manufacturing has aggressively pursued scaling that fruitfully resulted in tremendous advancement in device performances and realization of features sizes smaller than 10 nm. Due to many intrinsic material and technical obstacles, continuing the scaling progress of semiconductor devices has become increasingly arduous. As an effort to circumvent the areal limit, stacking devices in a three-dimensional fashion has been suggested. This approach is commonly called monolithic three-dimensional (M3D) integration. In this work, we examined technical issues that need to be addressed and overcome to fully realize energy efficiency, short latency and cost competency. Full-fledged M3D technologies are expected to contribute to various new fields of artificial intelligence, autonomous gadgets and unknowns, which are to be discovered.

Keywords

Acknowledgement

이 논문은 정부(과학기술정보통신부)의 재원으로 한국연구재단-차세대지능형반도체기술개발(소자)사업 지원을 받아 수행된 연구임[연구과제명: 저온 공정 산화물 반도체 기반 초저전력 단일3차원 집적 로직 소자 및 아키텍쳐 개발(NRF-2020M3F3A2A01085791)].

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