Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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Dependence of contact resistance in SiC device by annealing conditions

어닐링 조건에 의한 SiC 소자에서 콘택저항의 변화

  • Received : 2021.08.27
  • Accepted : 2021.09.24
  • Published : 2021.09.30
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Abstract

Stable operation of semiconductor devices is needed even at high temperatures. Among the structures of semiconductor devices, the area that can cause unstable electrical responses at high temperatures is the contact layer between the metal and the semiconductor. In this study, the effect of annealing conditions included in the process of forming a contact layer of nickel silicide(NiSix) on a p-type SiC layer on the specific contact resistance of the contact layer and the total resistance between the metal and the semiconductor was investigated. To this end, a series of electrodes for TLM (transfer length method) measurements were patterned on the 4 inch p-type SiC layer under conditions of changing annealing temperature of 1700 and 1800 ℃ and annealing time of 30 and 60 minutes. As a result, it was confirmed that the annealing conditions affect the resistance of the contact layer and the electrical stability of the device.

고온에서도 반도체 소자의 안정적인 동작이 필요하다. 반도체 소자의 구조중에서 고온에서 불안정한 전기적 응답을 야기할 수 있는 영역은 금속과 반도체가 접합하는 콘택층이다. 본 연구에서는 p형 SiC 층위에 니켈-실리사이드(NiSix)의 콘택층을 형성하는 공정과정에 포함되는 어닐링 공정 조건이 콘택 저항의 비저항과 전체 저항에 미치는 효과를 고찰하였다. 이를 위해, 4인치 p형 SiC층 위에 전송길이 이론(transfer length method: TLM) 측정을 위한 알련의 전극 패턴들을 형성하였고, 어닐링 온도(1700와 1800℃)와 어닐링 시간(30와 60분)을 달리하여 4종의 시료를 제조하였으며, TLM을 이용한 저항을 측정하였다. 그 결과, 어닐링 조건이 콘택층의 저항과 소자의 전기적 안정성에 영향을 미치는 사실을 확인하였다.

Keywords

References

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