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출력 전력 및 효율 개선을 위한 3-스택 구조의 Ku 대역 CMOS 전력 증폭기

Ku-Band Three-Stack CMOS Power Amplifier to Enhance Output Power and Efficiency

  • Yang, Junhyuk (Dept. of Electronic Engineering, Soongsil University) ;
  • Jang, Seonhye (Dept. of Electronic Engineering, Soongsil University) ;
  • Jung, Hayeon (Dept. of Electronic Engineering, Soongsil University) ;
  • Joo, Taehwan (Agency for Defense Development) ;
  • Park, Changkun (Dept. of Electronic Engineering, Soongsil University)
  • 투고 : 2021.02.23
  • 심사 : 2021.03.27
  • 발행 : 2021.03.31

초록

본 논문에서는 높은 출력 전력을 확보함과 동시에 효율을 개선시킬 수 있는 전력 증폭기 구조를 제안하였다. 전력 소모를 최소화하기 위하여 구동 증폭단은 공통-소스 구조를 적용하였으며, 높은 출력 전력 확보를 위하여 전력 증폭단은 스택 구조를 적용하였다. 제안하는 구조의 검증을 위하여 아홉 개의 금속층을 제공하는 65-nm RFCMOS 공정을 이용하여 Ku 대역 전력 증폭기를 설계하였다. 동작 주파수 14 GHz에서 16 GHz 일 때, P1dB, power-added efficiency 및 전력 이득은 각각 20 dBm 이상, 23 dB 이상 및 25% 이상으로 확인 되었다.

We propose a Ku-band three-stack CMOS power amplifier to enhance the output power and efficiency. To minimize the dc power consumption, the driver stage is designed using common-source structure. To obtain high output power and utilize a voltage combining method, the power stage is designed using stack structure. To verify the proposed power amplifier structure, we design a Ku-band power amplifier using 65-nm RFCMOS process which provide nine metal layers. The P1dB, power-added efficiency, and gain are higher than 20 dBm, 23 dB, and 25%, respectively, while the operating frequency is 14 GHz-16 GHz.

키워드

참고문헌

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