Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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Gate Field Alleviation by graded gate-doping in Normally-off p-GaN/AlGaN/GaN Hetrojunction FETs

상시불통형 p-GaN/AlGaN/GaN 이종접합 트랜지스터의 게이트막 농도 계조화 효과

  • Cho, Seong-In (Dept. of Electronic and Electrical Engineering, Hongik University) ;
  • Kim, Hyungtak (Dept. of Electronic and Electrical Engineering, Hongik University)
  • Received : 2020.11.25
  • Accepted : 2020.12.31
  • Published : 2020.12.31
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Abstract

In this work, we proposed a graded gate-doping structure to alleviate an electric field in p-GaN gate layer in order to improve the reliability of normally-off GaN power devices. In a TCAD simulation by Silvaco Atlas, a distribution of the graded p-type doping concentration was optimized to have a threshold voltage and an output current characteristics as same as the reference device with a uniform p-type gate doping. The reduction of an maximum electric field in p-GaN gate layer was observed and it suggests that the gate reliability of p-GaN gate HFETs can be improved.

본 연구에서는 상시불통형 p-GaN 전력반도체소자의 신뢰성 향상을 위해 p-GaN 게이트막 내부의 전계를 완화하고자 p-GaN 게이트 도핑농도의 계조화를 제안한다. TCAD 시뮬레이션으로 균일한 도핑농도를 갖는 소자와 문턱전압과 출력 전류 특성이 동일하도록 p형 농도를 계조화하고 최적화하였다. p-GaN 게이트층에서의 전계 감소로 소자의 게이트 신뢰성이 개선될 수 있을 것으로 판단된다.

Keywords

References

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