Current Optics and Photonics

Optical Society of Korea (한국광학회)
권호 표지
DOI QR코드

DOI QR Code

All-optical Integrated Parity Generator and Checker Using an SOA-based Optical Tree Architecture

  • Nair, Nivedita (Amity School of Engineering & Technology, Amity University) ;
  • Kaur, Sanmukh (Amity School of Engineering & Technology, Amity University) ;
  • Goyal, Rakesh (Punjab Technical University)
  • Received : 2018.07.05
  • Accepted : 2018.09.17
  • Published : 2018.10.25
Download PDF
⟨ Previous Next ⟩

Abstract

The Semiconductor Optical Amplifier (SOA)-based Mach-Zehnder interferometer is a major contributor in all-optical digital processing and optical computation. Optical tree architecture provides one of the new, alternative schemes for integrated all-optical arithmetic and logical operations. In this paper, we propose an all-optical 3-bit integrated parity generator and checker using SOA-MZI-based optical tree architecture. The proposed scheme, able to process input signals at a desired operating wavelength, has been characterized using RZ-modulated signals at 10 Gbps. The maximum extinction ratios achieved at the output of the parity generator and checker are 10 dB and 8 dB respectively.

Keywords

References

  1. Lovkesh and A. Marwaha, "Reconfiguration of optical logics gates at 160 Gb/s based on SOA-MZI," J. Comput. Electron. 15, 1473-1483 (2016). https://doi.org/10.1007/s10825-016-0914-2
  2. Lovkesh and A. Marwaha, "Implementation of optical logic gates at 160 Gbps using nonlinear effect of single SOA," Opt. Laser Technol. 70, 112-118 (2015). https://doi.org/10.1016/j.optlastec.2015.01.006
  3. S. Kaur and R. S Kaler, "All optical circular shift register based on semiconductor optical Amplifiers" Opt. Quantum Electron. 46, 991-998 (2014). https://doi.org/10.1007/s11082-013-9814-x
  4. D. Verma, M. Ramachandran, and S. Prince, "Performance analysis for different data rates of proposed all optical half adder and full adder design," in Proc. IEEE Conference on Communication and Signal Processing (India, Apr. 2016).
  5. S. Kaur and R. S. Kaler, "All optical integrated full adder-subtractor and demultiplexer using SOA-based Mach-Zehnder interferometer," Int. J. Eng. Sci. Technol. 4, 303-310 (2012).
  6. S. Singh and Lokesh, "Ultrahigh speed optical signal processing logic based on SOA-MZI," IEEE J. Sel. Topics Quantum Electron. 8, 970-977 (2012).
  7. L. Wang, Y. Wang, S. Wang, Y. Geng, and M. Zhang, "All-optical flip-flop based on SOA and MZI switch," in Proc. Progress in Electromagnetic Research Symposium (China, Aug. 2016).
  8. J. N. Roy, "Mazh-Zehnder interferometer-based tree architecture for all-optical logic and arithmetic operations," Optik 120, 318-324 (2009). https://doi.org/10.1016/j.ijleo.2007.09.004
  9. M. M. Mano, Digital Design, 3rd ed, (Prentice-Hall, 2002).
  10. A. J. Poustie, K. J. Blow, A. E. Kelly, and R. J. Manning, "All optical parity checker with bit differential delay," Opt. Commun. 162, 37-43 (1999). https://doi.org/10.1016/S0030-4018(99)00070-X
  11. E. Dimitriadou, K. E. Zoiros, T. Chattopadhyay, and J. N. Roy, "Design of ultrafast all-optical 4-bit parity generator and checker using quantum-dot semiconductor optical amplifier-based Mach-Zehnder interferometer," J. Comput. Electron. 12, 481-489 (2013). https://doi.org/10.1007/s10825-013-0463-x
  12. D. Samanta and S. Mukhopadhyay, "All optical method of developing parity generator and checker with polarization encoded light signal," J. Opt. 41, 167-172 (2012). https://doi.org/10.1007/s12596-012-0080-2
  13. S. Kumar, Chanderkanta, and A. Amphhawan, "Design of parity generator and checker using electro-optic effect of Mach-Zehnder interferometers," Opt. Commun. 364, 195-224 (2016). https://doi.org/10.1016/j.optcom.2015.11.054
  14. V. K. Srivastava and V. Priye, "All-optical 4-bit parity checker design," Opt. Appl. 41, 157-164 (2011).
  15. S. Kaur and M. K. Shukla, "All-optical parity generator and checker circuit employing semiconductor optical amplifier-based Mach Zehnder interferometers," Opt. Appl. 47, 263-271 (2017).
  16. D. Kumar, C. Kumar, S. Gautam, and D. Mitra, "Design of Practical Parity generator and Parity checker circuits in QCA," in Proc. IEEE International Symposium on Nanoelectronic and Information Systems (India, Dec. 2017).
  17. K. R. Chowdhary, D. De, and S. Mukhopadhyay, "Parity checking and generating circuit with non-linear material in all-optical domain," Chin. Phys. Lett. 22, 1433-1435 (2005). https://doi.org/10.1088/0256-307X/22/6/037
  18. D. K. Gayen, A. Bhattachryya, T. Chattopadhyay, and J. N. Roy, "Ultrafast all-optical half adder using quantum-dot semiconductor optical amplifier-based Mach-Zehnder interferometer," IEEE J. Lightw. Technol. 30, 3387-3393 (2012). https://doi.org/10.1109/JLT.2012.2215579
  19. S. Singh, R. S. Kaler, and R. Kaur, "Realization of high speed all-optical half adder and half subtractor using SOA based logic gates," J. Opt. Soc. Korea 18, 639-645 (2014). https://doi.org/10.3807/JOSK.2014.18.6.639
  20. P. Dutta, C. Bandyopadhyay, C. Giri, and H. Rahaman, "Mach-Zehnder interferometer based all optical reversible carry-lookahead adder," in Proc. IEEE Computer Society Annual Symposium on VLSI (USA, Jul. 2014).
  21. S. Kaur, "All optical data comparator and decoder using SOA-based Mach-Zehnder interferometer," Optik 124, 2650-2653 (2013). https://doi.org/10.1016/j.ijleo.2012.07.041