Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
권호 표지
DOI QR코드

DOI QR Code

Study on Characteristics of 4H-SiC MOS Device with PECVD SiON Insulator

PECVD SiON 절연막을 이용한 4H-SiC MOS 소자 특성 연구

  • Kim, Hyun-Seop (School of Electronic and Electrical Engineering, Hongik University) ;
  • Lee, Jae-Gil (Dept. of Electrical and Computer Engineering, Seoul National University) ;
  • Lim, Jongtae (School of Electronic and Electrical Engineering, Hongik University) ;
  • Cha, Ho-Young (School of Electronic and Electrical Engineering, Hongik University)
  • Received : 2018.09.06
  • Accepted : 2018.09.18
  • Published : 2018.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

In this work, we have investigated the characteristics of 4H-SiC metal-oxide-semiconductor (MOS) devices with silicon oxynitride (SiON) insulator using plasma enhanced chemical vapor deposition (PECVD). After post metallization annealing, the trap densities of the fabricated devices decreased significantly. In particular, the device annealed at $500^{\circ}C$ in forming gas ambient exhibited excellent MOS characteristics along with negligible hysteresis, which proved the potential of PECVD SiON as an alternative gate insulator for use in 4H-SiC MOS device.

본 논문에서는 플라즈마 화학기상증착 (plasma enhanced chemical vapor deposition, PECVD) 방식을 이용한 산질화규소(Silicon oxynitride, SiON) 절연체를 이용하여 4H-SiC metal-oxide-semiconductor (MOS) 소자를 제작하고 특성 분석을 수행하였다. 제작된 소자는 금속 증착 후 열처리 과정 (post metallization annealing, PMA)을 통하여 트랩 밀도가 크게 감소하는 것을 확인하였으며, 특히 $500^{\circ}C$의 forming gas 분위기에서 열처리 된 소자의 경우 매우 뛰어난 MOS 특성을 나타내었다. 본 연구를 통하여 4H-SiC MOS 구조를 위한 대체 게이트 절연체로써 PECVD SiON의 활용 가능성을 확인 할 수 있었다.

Keywords

References

  1. T. Kimoto, "Material Science and Device Physics in SiC Technology for High-Voltage Power Devices," Jpn. J. Appl. Phys., vol.54, no.4, p.040103, 2015. DOI:10.7567/JJAP.54.040103
  2. J. A. Cooper and A. Agarwal, "SiC Power-Switching Device-The Second Electronics Revolution," Proc. IEEE, vol.90, no.6, pp. 956-968, 2002. DOI:10.1109/JPROC.2002.1021561
  3. V. V. Afanasev, M. Basler, G. Pensl, and M. Schulz, "Intrinsic SiC/$SiO_2$ Interface States," Phys. Stat. Sol. (a), vol.162, no.1, pp. 321-337, 1997. DOI:10.1002/1521-396X
  4. L. A. Lipkin and J. W. Palmour, "Improved Oxidation Procedures for Reduced $SiO_2$/SiC Defects," J. Electron. Mater., vol.25, no.5, pp. 909-915, 1996. DOI:10.1007/BF02666657
  5. L. A. Lipkin and J. W. Palmour, "Insulator Investigation on SiC for Improved Reliability," IEEE Trans. Electron Devices, vol.46, no.3, pp. 525-532, 1999. DOI: 10.1109/16.748872
  6. H. R. Lazar, V. Misra, R. S. Johnson, and G. Lucovsky, "Characteristics of Metalorganic Remote Plasma Chemical Vapor Deposited $Al_2O_3$ Gate Stack on SiC Metal-Oxide-Semiconductor Devices," Appl. Phys. Lett., vol.79, no.7, pp. 973-975, 2001. DOI:10.1063/1.1392973
  7. A. Paskaleva, R. R. Ciechonski, M. Syvajarvi, E. Atanassova, and Yakimova, "Electrical Behavior of 4H-SiC Metal-Oxide-Semiconductor Structures with $Al_2O_3$ as Gate Dielectric," J. Appl. Phys., vol.97, no.12, p.124507, 2005. DOI:10.1063/1.1938267
  8. V. V. Afanas'ev, S. A. Campbell, K. Y. Cheong, F. Ciobanu, S. Dimitrijev, G. Pensl, A. Stesmans, and L. Zhong, "Electronic Properties of $SiON/HfO_2$ Insulating Stacks on 4H-SiC (0001)," Mater. Sci. Forum, vol.457-460, pp. 1361-1364, 2004. DOI:10.4028/www.scientific.net/MSF.457-460.1361
  9. J. H. Moon, D. I. Eom, S. Y. No, H. K. Song, J. H. Yim, H. J. Na, J. B. Lee, and H. J. Kim, "Electrical Properties of the $La_2O_3$/4H-SiC Interface Prepared by Atomic Layer Deposition Using $La(iPrCp)_3$ and $H_2O$," Mater. Sci. Forum, vol.527-529, pp. 1083-1086, 2006. DOI:10.4028/www.scientific.net/MSF.527-529.1083
  10. M. L. Green, E. P. Gusev, R. Degraeve, and E. L. Garfunkel, "Ultra-thin (<4 nm) SiO2 and Si-O-N Gate Dielectric Layers for Silicon Microelectronics: Understanding the Processing, Structure, and Physical and Electrical Limits," J. Appl. Phys., vol.90, no.5, pp. 2057-2121, 2001. DOI:10.1063/1.1385803
  11. K. Chatty, V. Khemka, T. P. Chow, and R. J. Gutmann, "Re-Oxidation Characteristics of Oxynitrides on 3C- and 4H-SiC," Jour. Elec. Mater., vol.28, no.3, pp. 161-166, 1999. DOI:10.1007/s11664-999-0007-0
  12. S. Chakraborty, P. T. Lai, and P. C. K. Kwok, "MOS Characteristics of NO-Grown Oxynitrides on N-Type 6H-SiC," Microelectronics Reliability, vol.42, no.3, pp. 455-458, 2002. DOI:10.1016/S0026-2714(01)00220-7
  13. H.-S. Kim, S.-W. Han, W.-H. Jang, C.-H. Cho, K.-S. Seo, J. Oh, and H.-Y. Cha, "Normally-off GaN-on-Si MISFET Using PECVD SiON Gate Dielectric," IEEE Electron Device Lett., vol.38, no.8, pp. 1090-1093, 2017. DOI:10.1109/LED.2017.2720719
  14. M. Okamoto, Y. Makifuchi, M. Iijima, Y. Sakai, N. Iwamuro, H. Kimura, K. Fukuda, and H. Okumura, "Coexistence of Small Threshold Voltage Instability and High Channel Mobility in 4H-SiC(0001) Metal-Oxide-Semiconductor Field-Effect Transistors," Appl. Phys. Express, vol.5, no.4, p.041302, 2012. DOI:10.1143/APEX.5.041302
  15. E. K. Evangelou, M. S. Rahman, and A. Dimoulas, "Correlation of Charge Buildup and Stress-Induced Leakage Current in Cerium Oxide Films Grown on Ge (100) Substrates," IEEE Trans. Electron Devices, vol.56, no.3, pp. 399-407, 2009. DOI:10.1109/TED.2008.2011935
  16. D. M. Fleetwood and N. S. Saks, "Oxide, Interface, and Border Traps in Thermal, $N_2O$, and $N_2O$-Nitrided Oxides," J. Appl. Phys., vol.79, no.3, pp. 1583-1594, 1996. DOI:10.1063/1.361002
  17. R. Singh, "Reliability and Performance Limitations in SiC Power Devices," Microelectronics Reliability, vol.46, no.5-6, pp. 713-730, 2006. DOI:10.1016/j.microrel.2005.10.013