Journal of the Korea Society of Computer and Information (한국컴퓨터정보학회논문지)

Korean Society of Computer Information (한국컴퓨터정보학회)
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Verification for the design limit margin of the power device using the HALT reliability test

  • Chang, YuShin (Division of Research and Development, Hanwha Systems)
  • Received : 2018.09.21
  • Accepted : 2018.10.22
  • Published : 2018.11.30
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Abstract

The verification for the design limit margin of the power device for the information communication and surveillance systems using HALT(Highly Accelerated Life Test) reliability test is described. The HALT reliability test performs with a step stress method which change condition until the marginal step in a design and development phase. The HALT test methods are the low temperature(cold) step stress test, the high temperature(hot) step stress test, the thermal shock cyclic stess test, and the high temperature destruct limit(hot DL) step stress test. The power device is checked the operating performance during the test. In this paper, the HALT was performed to find out the design limit margin of the power device.

Keywords

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Fig. 1. HALT Stress

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Fig. 2. HALT Stress setup

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Fig. 3. HALT Test Block Diagram

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Fig. 4. HALT Test Configuration

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Fig. 5. Power device

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Fig. 6. Cold Step Test Condition

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Fig. 7. Cold Step Test Result(Temperature)

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Fig. 8. Cold Step Test Result(Operating GUI)

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Fig. 9. Hot Step Test Condition

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Fig. 10. Hot Step Test Result(Temperature)

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Fig. 11. Hot Step Test Result(Operating GUI)

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Fig. 12. Thermal Shock Cyclic Test Condition

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Fig. 13. Thermal Shock Test Result(Temperature)

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Fig. 14. Thermal Shock Test Result(Operating GUI)

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Fig. 15. Hot DL Step Test Condition

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Fig. 16. Hot DL Step Test Result(Temperature)

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Fig. 17. Hot DL Step Test Result(Operating GUI)

Table 1. Test Equipment

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Table 2. Test Results

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