Journal of Electrical Engineering and Technology

  • 제13권1호
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  • Pages.168-180
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  • 2018
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  • 1975-0102(pISSN)
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  • 2093-7423(eISSN)
대한전기학회 (The Korean Institute of Electrical Engineers)
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An Adaptive Complementary Sliding-mode Control Strategy of Single-phase Voltage Source Inverters

  • Hou, Bo (School of Mechanical and Precision Instr ument Engineering, Xi'an University of Technology) ;
  • Liu, Junwei (Dept. of Electrical and Electronic Engineering, Shaanxi University of Technology) ;
  • Dong, Fengbin (Dept. of Electrical and Electronic Engineering, Shaanxi University of Technology) ;
  • Mu, Anle (School of Mechanical and Precision Instr ument Engineering, Xi'an University of Technology)
  • 투고 : 2016.10.23
  • 심사 : 2017.08.23
  • 발행 : 2018.01.01
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⟨ 이전 논문 다음 논문 ⟩

초록

In order to achieve the high quality output voltage of single-phase voltage source inverters, in this paper an Adaptive Complementary Sliding Mode Control (ACSMC) is proposed. Firstly, the dynamics model of the single-phase inverter with lumped uncertainty including parameter variations and external disturbances is derived. Then, the conventional Sliding Mode Control (SMC) and Complementary Sliding Mode Control (CSMC) are introduced separately. However, when system parameters vary or external disturbance occurs, the controlling performance such as tracking error, response speed et al. always could not satisfy the requirements based on the SMC and CSMC methods. Consequently, an ACSMC is developed. The ACSMC is composed of a CSMC term, a compensating control term and a filter parameters estimator. The compensating control term is applied to compensate for the system uncertainties, the filter parameters estimator is used for on-line LC parameter estimation by the proposed adaptive law. The adaptive law is derived using the Lyapunov theorem to guarantee the closed-loop stability. In order to decrease the control system cost, an inductor current estimator is developed. Finally, the effectiveness of the proposed controller is validated through Matlab/Simulink and experiments on a prototype single-phase inverter test bed with a TMS320LF28335 DSP. The simulation and experimental results show that compared to the conventional SMC and CSMC, the proposed ACSMC control strategy achieves more excellent performance such as fast transient response, small steady-state error, and low total harmonic distortion no matter under load step change, nonlinear load with inductor parameter variation or external disturbance.

키워드

E1EEFQ_2018_v13n1_168_f0001.png 이미지

Fig. 1. Circuit diagram of single-phase voltage source full-bridge inverter

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Fig. 2. Block diagram of the ACSMC control scheme

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Fig. 3. Single-phase PWM inverter with an LC output filter

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Fig. 4. Nonlinear load circuit with a diode rectifier andresistive-inductive load circuit (Rs =6.2Ω, CL =220μF, R1 =25Ω, R2 =19Ω and Lload =20mH)

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Fig. 5. Simulation and experimental results of the ACSMCscheme under load step change with ？16.67%variations in L: (a) and (b) Simulation. (c) Experi-

E1EEFQ_2018_v13n1_168_f0006.png 이미지

Fig. 6. Simulation and experimental results of the SMCscheme under load step change with ？16.67%variations in L. (a) and (b) Simulation. (c)Experiment. (Ch1: uo(50V/div), Ch2:io (5A/div) andCh3: E(5.0V/div))

E1EEFQ_2018_v13n1_168_f0007.png 이미지

Fig. 7. Simulation and experimental results of the CSMCscheme under load step change with ？16.67%variations in L. (a) and (b) Simulation. (c) and (d)Experiment. (Ch1: uo(50V/div),Ch2:io (5A/div) andCh3:E (5.0V/div))

E1EEFQ_2018_v13n1_168_f0008.png 이미지

Fig. 8. Simulation and experimental results of the ACSMCscheme under nonlinear load with ？16.67% variationsin L. (a) and (b) Simulation. (c) Experiment. (Ch1:

E1EEFQ_2018_v13n1_168_f0009.png 이미지

Fig. 9. Simulation and experimental results of the SMCscheme under nonlinear load with ？16.67% variationsin L. (a) and (b) Simulation. (c) Experiment. (Ch1:uo(50V/div),Ch2:io (5A/div) and Ch3:E (5.0V/div))

E1EEFQ_2018_v13n1_168_f0010.png 이미지

Fig. 10. Simulation and experimental results of the CSMCscheme under nonlinear load with ？16.67%variations in L. (a) and (b) Simulation. (c) Experi-ment. (Ch1: uo(50V/div), Ch2:io (5A/div) and Ch3:E (5.0V/div))

E1EEFQ_2018_v13n1_168_f0011.png 이미지

Fig. 11. Experimental results of the ACSMC, CSMC andSMC scheme under resistor-inductor load with？16.67% variations in L. (Ch1: uo (50V/div), Ch2:io (5A/div) and Ch3: E (5.0V/div))

E1EEFQ_2018_v13n1_168_f0012.png 이미지

Fig. 12. Experimental results of the ACSMC, CSMC andSMC scheme under nonlinear load with 16.67%variations in L. (Ch1: uo (50V/div), Ch2: E (5.0V/

E1EEFQ_2018_v13n1_168_f0013.png 이미지

Fig. 13. Simulation and experimental results of theinductor current estimator under load step change.(a) and (b) Simulation. (c) Experiment. (CH2:reverse of estimated inductor current (5A/div),CH3: inductor current (5A/div))

Table 1. System parameters of the inverter

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Table 2. Control parameters

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Table 3. The simulated and measured THD(%) of output voltage for the resistive load case (RL=20Ω)

E1EEFQ_2018_v13n1_168_t0003.png 이미지

Table 4. The simulated and measured THD(%) of output voltage for the nonlinear load cases

E1EEFQ_2018_v13n1_168_t0004.png 이미지

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